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Test substrate, test substrate mask and test substrate forming method

A mask pattern and substrate technology, applied in the field of integrated circuit manufacturing, can solve the problems of difficulty in ensuring the removal effect of the passivation layer, residual oxide on the surface of the passivation layer, deviation of the design size, etc., so as to suppress the residual oxide on the surface of the passivation layer. effect of the phenomenon

Active Publication Date: 2008-10-29
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in production practice, when the passivation layer is used as a polishing stop layer to planarize the shallow trench after filling the spacer, if the passivation layer isolated by the shallow trench isolation region If the difference in size is too large, it is easy to cause oxide residues on the surface of the passivation layer with a large size, so that it is difficult to ensure the removal effect of the passivation layer in the process of removing the passivation layer to obtain the active region, resulting in The actual size of the active region deviates from the designed size

Method used

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  • Test substrate, test substrate mask and test substrate forming method
  • Test substrate, test substrate mask and test substrate forming method
  • Test substrate, test substrate mask and test substrate forming method

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Embodiment Construction

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Abstract

The invention relates to a test matrix, which includes at least one continuous test unit series; the single continuous test unit series comprises at least two continuous test units; the continuous test unit comprises a basic test element and an auxiliary basic test element; the basic test element and the auxiliary basic test element in the continuous test unit series are connected by alternation; the dimension ratios of the basic test elements and the auxiliary basic test elements comprised by different continuous test units in the same continuous test unit series are the same; the dimensions of the basic test elements and the auxiliary basic test elements of the neighboring continuous test units are gradually changed. A proper technique window can be obtained by testing the remaining of the oxides on the surface of a passivation layer so as to restrain the oxide remaining phenomenon on the surface of the passivation layer from being generated.

Description

Method for forming test substrate, test substrate mask and test substrate technical field The invention relates to the technical field of integrated circuit manufacturing, in particular to a test base, a test base mask and a method for forming the test base. Background technique In the traditional integrated circuit manufacturing process, in order to ensure the quality of the product, inspection is required after many steps involved in the manufacturing process, such as inspection of products after grinding or etching. Usually, a test matrix is ​​fabricated on a semiconductor substrate, and then the test matrix is ​​used to replace the product for testing. In order to enable the test base to truly simulate the relevant manufacturing process of the product, the test base and the product are produced synchronously. Various attempts have been made in the industry regarding the structure of the test base and how to use the test base to perform process inspection and then com...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/544H01L21/00G03F1/14G03F1/44
Inventor 邓永平
Owner SEMICON MFG INT (SHANGHAI) CORP
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