Method and apparatus for patterning a conductive layer, and a device produced thereby
A conductive layer and layout technology, which is applied in the manufacture of semiconductor devices, organic semiconductor devices, and semiconductor/solid-state devices, etc., and can solve problems such as the weakening of substrate barrier performance.
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[0052] The following examples illustrate the invention. However, the present invention is not limited to these examples.
[0053] OLED:
[0054] Similar to that described in Figure 4, a 100 nm thick ITO anode was patterned on the compressible spacer layer. Samples were treated with air plasma (Harrick Plasma Cleaner PDC-002) for 2 minutes prior to spin-coat deposition. Preparation of tris(2,2'bipyridyl)ruthenium(II) hexafluorophosphate ([Ru(bpy) 3 ](PF 6 )) and a solution of polymethylmethacrylate (PMMA) with a molecular weight of 120000 g / mol. ([Ru(bpy) 3 ](PF 6 Two solutions of )) 40mg / ml and PMMA 25mg / ml were mixed in a volume ratio of 3:1. Films were prepared by spin coating at 1500 rpm, resulting in films of approximately 120-200 nm thickness. The device was dried on a hotplate at 100° C. for 1 hour under a nitrogen atmosphere. Without exposure to air, the device is placed in a vacuum chamber with a vacuum chamber of less than 10 -7 Base pressure in mbar. A 200...
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