Region protection unit, instruction set and method for protecting a memory region

A technology for memory area and area protection, which is applied in the fields of protecting memory areas, integrated circuit devices, and instruction sets, and can solve the problems of time-consuming operation and lack of flexibility.

Inactive Publication Date: 2009-02-25
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a memory protection architecture is time consuming and inflexible to operate since the memory must be divided into contiguous regions of the same size and each region starts with a fixed memory location

Method used

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  • Region protection unit, instruction set and method for protecting a memory region
  • Region protection unit, instruction set and method for protecting a memory region
  • Region protection unit, instruction set and method for protecting a memory region

Examples

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Embodiment Construction

[0029] It should be understood that the drawings are only schematic and not drawn to scale. It should also be understood that the same reference numbers are used throughout the drawings to indicate the same or similar parts.

[0030] Fig. 1 shows a first embodiment of an RPU 100 according to the invention. The RPU 100 has a first register 110 and a second register 120 coupled to a data line, such as a data communication bus 163 . The first register 110 stores boundary address values ​​of the memory region associated with the RPU 100 , ie address values ​​defining the lower or upper boundary of the memory region, while the second register 120 stores the size of the memory region. RPU 100 also includes an arithmetic function block 140 , such as a subtraction unit, having a first input coupled to data communication bus 163 and a second input coupled to first register 110 . The output of the arithmetic function unit 140 is coupled to the input of a comparator 150 having another ...

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PUM

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Abstract

A memory region protection unit is disclosed that comprises a first register for storing a memory region address, a second register for storing the memory region size, an arithmetic function block for executing an arithmetic function on a memory address provided to the region protection unit and the address value in the first register. The unit further has a comparator for comparing the output of the arithmetic function block with the size value in the second register, the comparator being coupled to an output for signalling the validity of the memory address on the bus The region protection unit has a controller configured to retrieve the memory region address and the memory region size from instructions issued to the region protection unit for associating the unit with said region, and to dissociate the unit from its memory region in response to a further instruction.

Description

technical field [0001] The invention relates to an area protection unit for protecting memory areas. [0002] The invention also relates to an integrated circuit (IC) device comprising a plurality of area protection units. [0003] The invention also relates to an instruction set for such an IC device. [0004] The invention also relates to a method for protecting a memory area. Background technique [0005] To meet the needs of audio and video equipment, the industry is moving towards integrating the entire system on a single chip, a so-called System-on-Chip (SoC), or in a single package such as a so-called System-in-Package (SiP). Today, a typical SoC already includes multiple, possibly different kinds of processor cores and dedicated hardware peripherals. On top of this hardware, layers of software (drivers, operating system, streaming and control layers) are stacked to build complete audio / video applications for use in home and mobile applications. [0006] The devel...

Claims

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Application Information

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IPC IPC(8): G06F12/14
CPCG06F12/145G06F12/1441
Inventor 休伯特斯·G·H·韦尔默朗纳加拉杰·布萨尤达亚·塞斯华
Owner NXP BV
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