Device and method for testing actions for inserting and pulling probe
A technology of motion detection and motion, applied in measuring devices, radio wave measurement systems, diagnosis, etc., can solve problems such as unfavorable upper computer and front-end system interface signal compatibility design, and achieve the effect of reducing the number
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Embodiment 1
[0030] Such as figure 2 As shown, when the probe is inserted into the socket, the position acquisition end of the probe is grounded, and the output P of the position acquisition end is a low-level signal 0; The output P of the acquisition terminal is a high-level signal 1. Such as image 3 As shown, the probe insertion and removal action detection device of this embodiment is used to detect the insertion and removal actions of a group of probes, namely, probes 1 to probes N, including a host computer 1 and an acquisition and processing system 2. The input terminals of the acquisition and processing system 2 are connected to each The probe position signal acquisition end, its output end is connected to the upper computer 1 through an interrupt signal line INT and the communication bus BUS. The communication bus BUS adopts a serial peripheral interface (serial peripheral interface, SPI for short) bus. The collection and processing system 2 further includes an interrupt gener...
Embodiment 2
[0038] Compared with the probe insertion and removal action detection device in the first embodiment, the difference between this embodiment lies in the interrupt generation logic unit.
[0039] Such as Figure 7 As shown, the interrupt generating logic unit of this embodiment includes an OR logic circuit OR, N exclusive OR logic circuits XOR corresponding to probes 1 to N, and N D flip-flops. The input terminal of each D flip-flop One input terminal of the XOR logic circuit XOR corresponding to it is connected to the position signal acquisition terminal of a probe, the clock input terminal of each D flip-flop is connected to the communication bus clock signal BUSCLK, and the output terminal of each D flip-flop is connected to its corresponding The other input terminal of the exclusive OR logic circuit XOR, the output terminal of each exclusive OR logic circuit is connected to an input terminal of the OR logic circuit OR, or the output terminal of the logic circuit OR is conne...
Embodiment 3
[0041] Compared with the second embodiment, the difference of this embodiment is that the collection and processing system 2 further includes a clock generation module. Therefore, this embodiment is used when the logic device in the acquisition processing system 2 is not sensitive to clock noise, and at this time the logic device does not need to use the bus clock to generate an interrupt. Such as Figure 8 In the shown interrupt generation logic unit, the clock input terminal of each D flip-flop is connected to the clock signal CLK provided by the clock generation module. according to Figure 8 In the sequential logic circuit shown, as long as any of the probe position signals P1~PN connected to each D flip-flop changes (that is, there is a probe insertion action), a clock will be generated at the output of the OR logic circuit OR Periodic positive pulse interrupt signal Pint. Similarly, in Figure 5 In the position query logic unit shown, each position signal register (s...
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