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Inter-procedural dataflow analysis of parameterized concurrent software

A data flow, parametric technique used in special data processing applications, program control using stored programs, design optimization/simulation, etc.

Inactive Publication Date: 2009-05-20
NEC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While interprocedural data flow analysis has proven to be an extremely effective technique for finding bugs in sequential programs, little work has been done on extending such data flow analysis to the concurrent domain

Method used

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  • Inter-procedural dataflow analysis of parameterized concurrent software
  • Inter-procedural dataflow analysis of parameterized concurrent software
  • Inter-procedural dataflow analysis of parameterized concurrent software

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Embodiment Construction

[0028] The illustrated embodiments relate to computer system verification, and more particularly to concurrent program verification, such as device drivers for controlling hardware components like hard drives, audio speakers, and the like. In a particularly useful embodiment, the parametric nature of computer systems is exploited, where concurrent programs consist of many copies of identical hardware or software components. Additionally, the illustrated embodiments are applicable to other applications such as embedded software used in mobile devices like cell phones, personal digital assistants (PDAs), database software, SQL servers, web browsers like Firefox TM , Explorer TM ) or any application that uses concurrency.

[0029] Model checking of interactive pushdown systems is a central problem that forms the basis of data flow analysis for concurrent programs. However, it is only piecewise-decidable for very restricted temporal logic. The basic obstacle is the undecidabili...

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Abstract

A system and method for computing dataflow in concurrent programs of a computer system, includes, given a family of threads (U1,..., If) and a Linear Temporal Logic (LTL) property, f, for a concurrent program, computing (12) a cutoff for the LTL property, f, where c is called the cutoff if for all n greater than or equal to c, Un satisfies f if Uc satisfies f. The cutoff is computed using (14) weighted multi-automata for internal transitions of the threads. Model checking (16) a cutoff number of processes is performed to verify race freedom in the concurrent program.

Description

[0001] Related application information [0002] This application claims Provisional Patent Application Serial No. 60 / 884,048, filed January 9, 2007, which is incorporated herein by reference. This application also claims Provisional Patent Application Serial No. 60 / 828,246, filed October 5, 2006, which is incorporated herein by reference. [0003] This application is related to currently co-filed U.S. Application Serial No. (TBD) entitled "MODEL CHECKING PAEAMETERIZED THREADS FOR SAFETY" (Attorney Docket 06049(449-4)), which is incorporated by reference Incorporated in this article. [0004] background technical field [0005] The present invention relates to computer system verification, and more particularly to verification of concurrent programs that exploit the parametric qualities of computer systems consisting of many copies of the same hardware or software components. Background technique [0006] Computer verification is required to ensure that the computer sys...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/06
CPCG06F17/5009G06F2217/10G06F30/20G06F2111/08
Inventor V·卡伦
Owner NEC CORP