Data transmission method between master and slave equipments through bus
A master device and device technology, applied in the field of data transmission, can solve the problems of reduced system data bandwidth, insufficient utilization of the pipeline of the bus arbiter and memory controller, etc., to achieve good compatibility, improve data throughput, and improve transmission efficiency. Effect
Inactive Publication Date: 2012-11-21
WUXI ZGMICRO ELECTRONICS CO LTD
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Problems solved by technology
If there are not enough requesting devices on the bus, the pipeline of the bus arbiter and memory controller will not be fully utilized, and the data bandwidth of the system will also be reduced.
Method used
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Embodiment Construction
[0053] Embodiments of the present invention will be described in detail below with reference to the drawings and examples.
[0054] Firstly, the bus protocol between the master device and the slave device in this embodiment will be introduced. Such as figure 1 As shown, the interaction signals between the master device (master) and the slave device (slave) through the bus are divided into three channels (channels), which are address channel (Address Channel), write channel (Write Channel) and read channel ( Read Channel), where:
[0055] Address channel, used to transmit address and related information between the master device and the bus;
[0056] Write channel, used to transmit write data related information between the master device and the bus;
[0057] The read channel is used to transfer read data related information between the master device and the bus.
[0058] For memories such as SDRAM, the bus is divided into an address bus and a data bus. The signals of the a...
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The invention discloses a method for data transmission between a main device and a slave device through a bus. An address channel, a read channel and a write channel are established between a main device and a slave device through a bus; and each channel has a handshaking signal. The method comprises the following steps: for each data transmission process, the main device sends a transmission request to the slave device in the address channel and outputs the address, the size and the read and write state information of data for transmission; the slave device samples the address, the size and the read and write state information, and feeds back the handshaking signal to the main device through the address channel; then, the main device and the slave device utilize the handshaking signal inthe read channel or the write channel and data signals to complete the transmission of read data or write data; and after detecting the handshaking signal fed back by the slave device in the address channel, the main device can send the next transmission request to the slave device in the address channel. The invention can increase the data throughput of the system.
Description
technical field [0001] The invention relates to data transmission technology, in particular to a method for transmitting data between master and slave devices through a bus. Background technique [0002] A System On Chip (SoC) has multiple functional modules such as processors, DMAs, and hardware accelerators, which need to access off-chip Synchronous Dynamic Random Access Memory (SDRAM, also known as synchronous DRAM). Synchronous DRAM is a new generation of dynamic memory, which can use the same clock as the CPU bus. [0003] When multiple modules on the on-chip bus request a certain storage resource at the same time, the bus arbiter is required to judge the routing, which brings a transmission delay of multiple clock cycles on the bus. For complex memories, such as SDRAM or DDR controllers, in order to meet the device's transmission protocol, multiple clock cycles are also required to analyze and process the transmission. Thus, the total time for each transfer is equal ...
Claims
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IPC IPC(8): G06F13/42
Inventor 林川
Owner WUXI ZGMICRO ELECTRONICS CO LTD