Data processing circuit and processing method with multi-format image coding and decoding functions
A data processing and format data technology, applied in television, electrical components, image communication, etc., can solve the problems of developing ASIC circuits without taking risks, high power consumption, and high investment, so as to improve processing efficiency and reduce the number of times data enters and exits memory , The effect of reducing power consumption
Active Publication Date: 2013-05-01
ASUSTEK COMPUTER INC
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Problems solved by technology
[0004] Using traditional ASIC to construct image codec, this image codec will have the advantage of low power consumption, but it requires a long time of hardware design and development research, and each ASIC can only be used for one format of image codec, and the current video codec standards still have too many variables to risk developing ASIC circuits
On the other hand, if a SIMD processing unit is used to construct an image codec, this kind of image codec can easily implement a variety of software-defined applications and custom functions (using high-level languages), and can also be implemented on the same generations of hardware platforms. However, this kind of image codec itself has high power consumption and requires a high degree of investment in software design and development
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[0020] In order to make the description of the present invention more detailed and complete, please refer to the following description and related drawings.
[0021] figure 1 It is a schematic diagram of the structure of a data processing circuit with multi-format image encoding and decoding functions in the first embodiment of the present invention. As shown in the figure, the instruction cycle of the data processing circuit 100 with multi-format image encoding and decoding functions has five stages: Instruction Fetch and Execute (hereinafter referred to as I / DF) stage 110, instruction decoding (Instruction Decode, hereinafter referred to as ID) stage 120, instruction execution (Execution, hereinafter referred to as EX) stage 130, memory access (Memory access) , Hereinafter referred to as MEM) stage 140 and Write Back (hereinafter referred to as WB) stage 150.
[0022] The I / DF stage 110 includes an instruction reading unit 112 and a data reading unit 114, which use direct memory ...
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The invention provides a data processing circuit and a processing method with multi-format image coding and decoding functions, wherein the data processing circuit includes a reading unit for reading a plurality of operation instructions and a plurality of original data from a memory; a plurality of execution units, wherein each execution unit is used for executing a image format coding and decoding instruction to operate the plurality of original data into corresponding a plurality of result data; and a instruction decoding unit for analyzing the plurality of operation instructions, generating corresponding a plurality of image format coding and decoding instructions, and sending the image format coding and decoding instructions to the plurality of corresponding execution units accordingto performance of the plurality of execution units.
Description
Technical field [0001] The present invention relates to a data processing circuit, and in particular to a data processing circuit with multi-format image encoding and decoding functions, which can support multiple video standards and can simultaneously process encoding and decoding of data of multiple video standards . Background technique [0002] Due to the advancement of science and technology, video coding and decoding technology is an indispensable key technology in the information and communication technology industry such as consumer electronics, information, and network communications that use multimedia as the main axis. From the point of view of the international standards of video coding and decoding technology, according to the International Telecommunication Union Telecommunications Standards Department (ITU-T) video coding specifications such as H.261, H.262, H.263 and H.264, and the International Organization for Standardization (ISO) And the video coding standard...
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IPC IPC(8): H04N7/26H04N19/156H04N19/42H04N19/436H04N19/70
Inventor 叶柏园
Owner ASUSTEK COMPUTER INC