Clock-synchronization digital phase-locking method and device
Patent Information
- Authority / Receiving Office
- CN Β· China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- DONGGUAN UNIV OF TECH
- Publication Date
- 2012-10-03
- Estimated Expiration
- Not applicable Β· inactive patent
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Abstract
Description
technical field
[0001] The present invention relates to the technical field of signal phase locking, in particular to a clock synchronous digital phase locking method and device. Background technique
[0002] In the fields of communication, instrumentation, automatic control, etc., it is often necessary to use signal phase-locking technology to process various input signals. The signal phase-locked loop circuit is a commonly used signal phase-locking technology, such as clock synchronization in data reception. attached figure 1 is a block diagram of an existing digital phase-locked loop, as attached figure 1 As shown, a general digital phase-locked loop includes: a phase detector, which is used to compare the phase difference between the input reference signal and the feedback signal, and outputs an error signal representing the phase difference; low-pass filter, low-pass filter Immediately after the phase detector, it is used to filter out the low-frequency signal in the...