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Safe preparation method for cipher chip to resist against bypass attack

A cryptographic chip and side-channel attack technology, applied in the field of information security, to achieve the effect of defense against complex side-channel attacks, simple design, and strong self-healing ability

Inactive Publication Date: 2012-05-09
中电科网络安全科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, even with the above defense methods, attackers can crack the cryptographic system through advanced signal processing technology, high-order side-channel attack technology and template attack technology.
There is no really effective way to avoid the leakage of encryption chip bypass information

Method used

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Examples

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Embodiment Construction

[0021] All features disclosed in this specification, or steps in all methods or processes disclosed, may be combined in any manner, except for mutually exclusive features and / or steps.

[0022] Any feature disclosed in this specification (including any appended claims, abstract and drawings), unless expressly stated otherwise, may be replaced by alternative features which are equivalent or serve a similar purpose. That is, unless expressly stated otherwise, each feature is one example only of a series of equivalent or similar features.

[0023] In the initialization phase of the encryption chip, one or more random numbers FR are generated inside the encryption chip i (0i XOR operation is performed on the initial key Key to mask its initial value, namely This operation generates a new mask key FK, let Key=8, FR 1 = 3, FR 2 =9,FR 3 = 5, then we can get The parameters for the p fixed masks are The parameters of the fixed mask in this embodiment

[0024] During the ope...

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Abstract

The invention relates to a safe preparation method for a cipher chip to resist against bypass attack, which comprises the following steps: a fixed mask cipher FRi (0<i<p) generated by the cipher chip in the initialization phase is combined with a random mask cipher Randi (0<i<q) generated in the operation process of a cryptographic algorithm so that the cryptographic algorithm at least comprises a test failure point in the operation process; an attacker can not obtain a bypass information disclosure value of the point and can not carry out statistical attack; accordingly, the disclosed bypass information is invalid by updating the fixed mask cipher at regular time, and a key does not need to be frequently replaced. The preparation method has simple design, is easy to realize, can defend various complicated bypass attacks, has higher self-healing performance and is particularly suitable for the safety protection of the cipher chip.

Description

technical field [0001] The invention relates to the field of information security, in particular to a secure preparation method for a cryptographic chip against side-channel attacks. Background technique [0002] Normally, the security of a cryptographic chip is measured by the cryptographic algorithm used by the chip and the algorithmic complexity of the security protocol. However, when cryptographic algorithms are applied to physical implementation, algorithm complexity is not the only measure of security. Research shows that even theoretically safe cryptographic algorithms or security protocols may be insecure due to improper physical implementation. [0003] The security threat of cryptographic chips comes from a new cryptographic attack technique—side-channel attack. In terms of attack principle, the traditional cryptographic attack is to crack the cryptographic system by analyzing the correlation between the mathematical model of the cryptographic algorithm and the pl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F21/02G06F21/70
Inventor 张涛
Owner 中电科网络安全科技股份有限公司
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