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Place-and-route layout method with same footprint cells

An integrated circuit, automatic generation technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of inconvenience and inappropriateness

Active Publication Date: 2012-08-29
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] It can be seen that the above-mentioned existing method for automatically generating integrated circuit layout obviously still has inconvenience and defects in method and use, and needs to be further improved urgently.
In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general method has no suitable method to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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  • Place-and-route layout method with same footprint cells
  • Place-and-route layout method with same footprint cells
  • Place-and-route layout method with same footprint cells

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Embodiment Construction

[0053] In order to further illustrate the technical means and effects that the present invention adopts to achieve the intended purpose of the invention, below in conjunction with the accompanying drawings and preferred embodiments, the present invention and the clearer concept of the operation of the components and systems mentioned in the present invention will be To become more obvious, the specific implementation, method, steps, features and effects of the method for automatically generating an integrated circuit layout according to the present invention will be described in detail below. Wherein the same reference number (if it appears in more than one figure) is used to denote the same element.

[0054] The present invention discloses an integrated circuit placement and routing layout method, which uses components in a component library with the same height, and therefore has the same pin position to optimize the arrangement of the layout.

[0055] figure 2 is a layout...

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Abstract

This invention discloses a method for automatically generating an integrated circuit layout, the method comprises determining a first cell height, creating a plurality of standard cells all having the first cell height, and generating the IC layout from the plurality of standard cells by placing and routing thereof. The method for generating the integrated circuit layout comprises the steps of marking a specific element by means of a markup layer so as to prepare a transition layout; and preparing a plurality of required layout variations through applying at least one logical operation on the transition layout so as to retrieve a database so as to generate a final integrated circuit layout, wherein the layout change variations comprises the conditions of widening the transistor channel length of a specific element and setting a virtual structure in the final integrated circuit layout. The invention improves the utilization of layout area of the integrated circuit. The element is able to be easily replaced because the arrangement of the element is in the grid. The circuits between elements are easily connected owing to contact alignment between elements.

Description

technical field [0001] The present invention relates to an automatic layout method for integrated circuits (IC), in particular to a method for determining placement and routing (Place- and-Route) method. Background technique [0002] Many integrated circuits (ICs), especially in application-specific integrated circuits (Application-Specific-Integrated Circuit, ASIC) and programmable field effect gate array (Field Programmable Gate Cell Blocks) to produce the desired layout. These automated tools place the aforementioned pre-built tiny component blocks and the in-circuit connections therebetween according to the designer's specification. [0003] figure 1 It is a schematic block diagram illustrating an existing conventional standard cell library (CellLibrary) 102 for making place and route layouts. In order to accommodate different driving capabilities (DrivingCapabilities), the existing conventional standard component library 102 may contain components with different hei...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
CPCG06F17/5077G06F30/394
Inventor 鲁立忠王中兴李秉中戴春晖田丽钧张广兴
Owner TAIWAN SEMICON MFG CO LTD