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Memory device, electronic device, and host apparatus

An electronic device and memory technology, applied in the field of initialization, can solve the problems of prolonged system initialization processing time and the like

Active Publication Date: 2010-03-31
KIOXIA CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, when the interface goes through this process, the processing time for system initialization is extended

Method used

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  • Memory device, electronic device, and host apparatus
  • Memory device, electronic device, and host apparatus
  • Memory device, electronic device, and host apparatus

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0059] An electronic device and a host device according to a first embodiment of the present invention are described below. The electronic device of the first embodiment has a configuration in which the electronic device can be embedded in a host device, and the host device supports the electronic device. will refer to Figures 1 to 8 The electronic device and host device of the first embodiment are described.

[0060] figure 1 A schematic configuration of an apparatus according to a first embodiment of the present invention and a host device in which the apparatus of this embodiment is embedded is shown. refer to figure 1 , a host device 1 includes two host controllers 2 and 3 , a socket 4 , a CPU (Central Processing Unit) 6 , and a system memory 7 .

[0061] The CPU 6 controls the overall operation of the host device 1, and operates according to programs stored in a ROM (Read Only Memory, not shown). The system memory 7 is used so that the CPU 6 temporarily stores vario...

no. 2 example

[0132] In the second embodiment, the initialization time of the first embodiment is shortened.

[0133] The embedded device and the host device of the second embodiment have the same figure 1 and 2 ) in the same configuration. will refer to Figure 9 The operation of the second embodiment is described. Figure 9 is a flowchart showing the operation of the host device of the second embodiment.

[0134] Steps S1 to S5 of the second embodiment are the same as steps S1 to S5 of the first embodiment. After step S5, the host controller 3 provides an extended voltage check command in which the address segment value is set to the broadcast value (step S31). Even if the embedded devices 11 to 14 receive the extended voltage check command, the embedded devices 11 to 14 do not send back a response. As described above, since the matching relationship is established between the supply voltages of the embedded devices 11 to 14 and the operating voltage of the host controller 3, even i...

no. 3 example

[0145] The third embodiment relates to a method of supporting multiple devices with a host device having only one bus. will refer to Figure 10 and 11 A method according to the third embodiment is described. Figure 10 A device according to a third embodiment of the present invention and a configuration of a host device in which the device is embedded are schematically shown.

[0146] Such as Figure 10 As shown in , the host device 21 includes a host controller 22 . The host controller 22 has the same configuration as the host controllers 2 and 3 of the first embodiment.

[0147] The embedded devices 11 to 14 are connected to the host controller 22 through a bus. The host controller 22 is connected to the slot 4 through a buffer 23 and an analog switch 24 . Specifically, only lines of signals flowing from the host controller 22 toward the slot 4 are connected from the host controller 22 to the slot 4 through the buffer 23 . A unidirectional signal line such as a clock ...

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PUM

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Abstract

The invention relates to a memory device, an electronic device, and a host apparatus. A memory device (11) includes a semiconductor memory (11c) and a controller (11a). The semiconductor memory (11c)includes a first storage area (11c1) and a second storage area (11c2). The controller (11a) controls the semiconductor memory (11c). The memory device (11) is capable of having a first state which isaccessible to the first storage area (11c1) and a second state in which data is readable from the second storage area (11c2). The controller (11a) is configured to recognize a first command, a secondcommand, and a third command. The first command transfers the memory device (11) to the first state after the memory device is turned on. The second command transfers the memory device (11) from the first state to the second state. The third command transfers the memory device (11) to the second state without passing through the first state after the memory device is turned on.

Description

technical field [0001] The present invention relates to memory devices, electronic devices, and host devices. For example, the present invention relates to a host device into which a memory card is inserted, and initialization of electronic devices and memory devices that may be embedded in the host device. Background technique [0002] Currently, a memory system such as a memory card in which a nonvolatile semiconductor memory such as a flash memory is utilized has been used as a recording medium for audio data or video data. A NAND type flash memory can be cited as a typical example of the flash memory used in this memory system. The memory system is plugged into a host device, which performs data transfer with the memory system. An SD (registered trademark) card is known as a memory system. [0003] There are various well-known interfaces between the memory system and the host device. An SD interface can be cited as an example of the interface. The SD interface is an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06K17/00G06F3/08G06F12/06
CPCG06F9/4401G06F12/0246G06F3/06G06F12/06G06F13/16
Inventor 藤本曜久坂本广幸
Owner KIOXIA CORP