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Unbalanced design method of high-position current source unit of current rudder-type digital-to-analog converter

A technology of digital-to-analog converters and design methods, applied in digital-to-analog converters, electrical components, circuits, etc., can solve the problems of large precision errors of digital-to-analog converters, the inability to effectively reduce second-order errors, and high integral nonlinear errors , to achieve the effects of offsetting the second-order error, improving accuracy, and reducing integral nonlinear error

Active Publication Date: 2010-04-14
杭州思泰微电子有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Since the second-order error cannot be effectively reduced, the integral non-linear error (INL), an important indicator of the static performance of the existing high-speed and high-precision current-steering digital-to-analog converter, is high, resulting in a large accuracy error of the entire digital-to-analog converter

Method used

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  • Unbalanced design method of high-position current source unit of current rudder-type digital-to-analog converter
  • Unbalanced design method of high-position current source unit of current rudder-type digital-to-analog converter
  • Unbalanced design method of high-position current source unit of current rudder-type digital-to-analog converter

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Embodiment 1

[0020] Embodiment 1: a high-speed and high-precision current steering digital-to-analog converter with 10-bit precision, its low-order current unit is composed of 4 binary current source units, and its high-order current unit controls 6 high-order, which includes 63 current source units. The 63 current source units are placed in the physical layout of the actual chip, and each unit is divided into four parts. These four parts are placed symmetrically in four quadrants, forming an 8×8 matrix in each quadrant. It is 8 rows and 8 columns, and the extra unit is a redundant unit. Since it is placed symmetrically in four quadrants, the units in each quadrant are opened in a specific order. Take the second quadrant as an example, see figure 1 , counting from left to right, the fourth column of the physical column is the first column to be opened, and the fifth column of the physical column is the second column to be opened. For the order of the number of columns to be opened, see fig...

Embodiment 2

[0022] Embodiment 2: a high-speed and high-precision current steering digital-analog converter with 10-bit precision, its low-order current unit is composed of 4 binary current source units, and its high-order current unit controls 6 high-order, which includes 63 current source units. The 63 current source units are placed in the physical layout of the actual chip, and each unit is divided into four parts. These four parts are placed symmetrically in four quadrants. The structure diagram of the second quadrant is shown in figure 1 . Among them, the second-order error brought by the CMOS process itself is 0.032%, and the length of the MOS tubes of the 63 current source units is l, and the widths of the 1st, 2nd, 3rd, 4th, 5th, and 6th column MOS tubes are all is w, the width of the MOS tube in the seventh column is 0.985w, and the width of the MOS tube in the eighth column is 1.015w.

[0023] After adjusting the width of the MOS tubes in the 7th and 8th columns, the INL schema...

Embodiment 3

[0024] Embodiment 3: a high-speed and high-precision current steering digital-analog converter with 11-bit precision, its low-order current unit is composed of 5 binary current source units, and its high-order current unit controls 6 high-order, which includes 63 current source units. The 63 current source units are placed in the physical layout of the actual chip, and each unit is divided into four parts. These four parts are placed symmetrically in four quadrants. The structure diagram of the second quadrant is shown in figure 1 . Among them, the second-order error brought by the CMOS process itself is 0.036%, and the length of the MOS tubes of the 63 current source units is l′, and the width of the MOS tubes in the first, second, third, fourth, fifth, and sixth columns Both are w', the width of the MOS tube in the seventh column is 0.98w', and the width of the MOS tube in the eighth column is 1.02w'.

[0025]After adjusting the width of the MOS tubes in the 7th and 8th col...

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Abstract

The invention relates to an unbalanced design method of a high-position current source unit of a current rudder-type digital-to-analog converter, which can effectively reduce integral nonlinearity errors, thus improving the accuracy of the high-speed and high-accuracy current rudder-type digital-to-analog converter. The unbalanced design method comprises a high-position current source unit structure under the existing sequence of specific switches and is characterized in that the current intensity can be regulated by adjusting width-to-length ratio (W / L) of a row MOS tube at the outmost edge of two sides of each quadrant current source unit matrix, thus leading the current to be unequal with the current generated by other row current source units in the same quadrant, and using unbalanced current difference to counteract second-order errors brought by a system.

Description

(1) Technical field [0001] The invention relates to the technical field of 10-14 high-speed and high-precision current-steering digital-to-analog converters, in particular to an unbalanced design method for high-position current source units of the current-steering digital-to-analog converter. (2) Background technology [0002] The existing high-speed and high-precision current-steering digital-to-analog converter is based on the standard deep sub-micron CMOS technology. At present, the precision covers 8 to 14 bits, and the speed is as high as 1GHz. When the precision reaches or exceeds 10 bits, its high-speed and high-precision The current steering type digital-to-analog converter structure includes a high-order current unit and a low-order current unit, and the low-order current unit is composed of M binary current source units, and its current size is from 1 to 2 M-1 I, where I represents the current of a least significant bit, and the high bit current unit controls the ...

Claims

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Application Information

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IPC IPC(8): H01L27/088H01L29/78H03M1/66
Inventor 马辉
Owner 杭州思泰微电子有限公司
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