Bytecode caching device and accessing method for real-time Java processor

Abstract

The invention relates to a bytecode caching device and an accessing method for a real-time Java processor, and belongs to the field of computers. The device comprises a bytecode counter, a caching read address multiplexer, a caching write address multiplexer, a caching read address register, a caching write address register, a caching read address summator, a caching write address summator, a bytecode readable comparator, a bytecode writable comparator, a main memory, a cache and a bytecode register. The device utilizes the characteristic that Java bytecodes have unequal length and mostly have less than 4 bytes, takes four bytes each time and uses up the bytes for several times so as to generate the prefetching time. The device has an automatic instruction prefetching mechanism, thereby decreasing the CPU pauses caused by fetching the instruction, and also determining the positions of missed bytecode to statically forecast the access time of the bytecodes. The performance of the Java processor can be greatly improved while the predictable program implementation is ensured.

Description

(1) Technical field [0001] The invention relates to a cache memory mechanism of a Java processor in the computer field, in particular to a bytecode (instruction) cache device and an access method for a real-time Java processor. (2) Background technology [0002] In order to match the access speed of the memory with the execution speed of the CPU as much as possible, the current computer system generally meets the various requirements of access speed, storage capacity and manufacturing cost through a multi-level memory structure. Usually, the memory with fast access speed but high manufacturing cost is placed closer to the CPU with a smaller storage capacity, and it stores a data subset of the larger memory farther away from the CPU. According to the principle of program locality, in most cases, the CPU will access the required data in the high-speed memory close to it, and only a few cases need to access the far memory, and copy a batch of data to the high-speed memory. In ...

AI Technical Summary

Problems solved by technology

The advantage is that the execution time is easy to predict statically, but the problem is that the utilization rate of the loaded method is low, and the processor waits for a long time when the method is called and returned.

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