Electrostatic discharge protection semiconductor device and method for mafacturing the same

Abstract

An electrical device, including a semiconductor device such an electrostatic discharge protection semiconductor device, and a method for manufacturing the same. An electrostatic discharge protection semiconductor device may include a substrate and a gate in and / or over the substrate. The gate may be multi-layered, and may include a gate oxide layer and a gate electrode. An electrostatic discharge protection semiconductor device may include a source region formed in and / or over a predetermined area of the substrate on a side of the gate, and a plurality of drain regions which may be sequentially multi-layered in and / or over the substrate on an opposing side of the gate in a vertical direction. At least one drain region may be overlapped with the gate in a horizontal direction.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2008-0097104 (filed on October 2, 2008) based on 35 U.S.C119, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to a semiconductor device, and more particularly, to an electrostatic discharge protection semiconductor device and a manufacturing method thereof, wherein the abnormal leakage current ( abnormal leakage current). Background technique [0003] Embodiments of the present invention relate to an electronic device. Some embodiments of the present invention relate to a semiconductor device (eg, an electrostatic discharge protection semiconductor device) and a method of manufacturing the same. [0004] Recently, semiconductor devices such as high voltage semiconductor devices have been widely developed and used in various applications including liquid crystal display (LCD), integrated circuit (IC), and other technologies. ...

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Problems solved by technology

Also, the electrons and holes ionized by impacts in the lower edge gate region 111 may deplete the interface between the substrate 101 and the gate oxide layer 102, thereby possibly generating a leakage current.

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