38results about How to "Improve protection characteristics" patented technology

The invention provides a protection device for a power component and a manufacturing method thereof, and relates to the technical field of semiconductor devices. The method comprises firstly, providing an N-type substrate in which a first silicon oxide layer is formed, and removing the bottom of the first silicon oxide layer by etching; secondly, successively forming a first P-type epitaxial layer, an N-type epitaxial layer and a second P-type epitaxial layer, forming a silicon oxide underlayer on a lower surface of the first P-type epitaxial layer; forming a second silicon oxide layer on thesidewalls of grooves in the first P-type epitaxial layer, the N-type epitaxial layer and the second P-type epitaxial layer; then forming a third silicon oxide layer and a metal layer to form a first electrode and a second electrode; and finally, forming a silicon oxide passivation layer on the surface. The method realizes the integration of TVS by using a buried layer process, improves the anti-surge capability of a device, reduces the area of the device, realizes the small-sized package of a high-end IC, and solves the low anti-surge capability and large device area in the prior art.

The invention discloses a parallel MOS transistor current sharing and short circuit protection circuit, and relates to the technical fields of electronic circuits and power electronics. The parallel MOS transistor current sharing and short circuit protection circuit comprises a switching value monitoring circuit, an analog quantity monitoring circuit, a fast monitoring circuit, an MOS transistor parallel current sharing circuit, a driving circuit and a main control circuit, wherein one end of the switching value monitoring circuit is connected with the main control circuit; the other end of the switching value monitoring circuit is connected with the main control circuit and one end of the analog quantity monitoring circuit; the other end of the analog quantity monitoring circuit is connected with the fast monitoring circuit; the fast monitoring circuit is connected with the main control circuit and one end of the MOS transistor parallel current sharing circuit; and the MOS transistor parallel current sharing circuit is connected with the driving circuit and external bus voltage. The parallel MOS transistor current sharing and short circuit protection circuit realizes that each MOS transistor is equal in flowing current and switching speed, and can detect the current operating state of each MOS transistor quickly and effectively; and the parallel MOS transistor current sharing and short circuit protection circuit is simple and reliable in circuit construction and small in PCB occupation area.

The invention provides a current protection chip and a manufacturing method thereof. The current protection chip comprises a substrate of a first conductivity type; afirst epitaxial layer of a secondconductivity type; afirst buried layer of a first conductivity type and a second buried layer of a second conductivity type, formed in the first epitaxial layer; asecond epitaxial layer of a first conductivity type formed on a surface of the first epitaxial layer; afirst injection region of a second conductivity type and a second injection region of the first conductivity type, formed on a surfaceof the second epitaxial layer, and the second injection region is located in the first injection region; apolycrystalline silicon layer connected to the first implantation region and the first buriedlayer, respectively; adielectric layer formed on an upper surface of the second epitaxial layer; afirst electrode including a first portion penetrating the dielectric layer and extending to the second implantation region and a second portion formed on a surface of the dielectric layer; asecond electrode formed on a lower surface of the substrate and connected to the substrate. The invention can improve device performance and reduce device cost.

The invention relates to a transient voltage suppressor and a manufacturing method thereof. The transient voltage suppressor includes an N-type substrate, a first trench and a second trench formed onthe surface of the N-type substrate, first and second P-type diffusion regions formed on the surfaces of the first trench and the second trench, an N-type epitaxy formed on the surfaces of the N-typesubstrate and the first and second P-type diffusion regions, a silicon oxide layer formed on the N-type epitaxy, two third trenches which pass through the N-type epitaxy and extends to the N-type substrate and two sides of the first P-type diffusion region, two fourth trenches which pass through the N-type epitaxy and extends to the N-type substrate and two sides of the second P-type diffusion region, silicon oxide in the third and the fourth trenches, a first through hole corresponding to the first trench, a second through hole corresponding to the second trench, a P-type injection region which is formed at the surface of the N-type epitaxy, an N-type injection region formed on the surface of the P-type injection region, an opening corresponding to the N-type injection region, and a P-type injection layer formed at the other side of the N-type substrate.