Network configuration and restoration method of LXI device
A technology of network configuration and reset method, applied in bus network, data exchange through path configuration, electrical components, etc., can solve the problem of low efficiency of LAN reset mechanism, and achieve the effect of good practicability
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specific Embodiment approach 1
[0024] Specific implementation mode one: the following combination Figure 1 to Figure 2 Describe this embodiment, the local area network reset mechanism of this embodiment based on LXI bus standard comprises LAN reset button 1, FPGA2, embedded processor 3 and LAN status indicator 4, the output end of LAN reset button 1 links to each other with the input end of FPGA2, The interrupt signal output end of FPGA2 is connected with the external interrupt input end of embedded processor 3; the GPIO output end of embedded processor 3 is connected with the state signal input end of FPGA2, and the state signal output end of FPGA2 is connected with the LAN state indicator 4 connected to the status signal input,
[0025] When FPGA2 detects the pressing information of LAN reset button 1, it starts the reset process, and the reset process is as follows:
[0026] Step 1, the state indication of the LAN state indicator 4 remains as the state before pressing,
[0027] Step 2. Determine wheth...
specific Embodiment approach 2
[0046]Specific Embodiment 2: This embodiment differs from Embodiment 1 in that 1.2s>t1>0.8s, 4.2s>t2>3.5s, and the others are the same as Embodiment 1.
specific Embodiment approach 3
[0047] Embodiment 3: This embodiment differs from Embodiment 1 in that t1 = 1s, t2 = 4s, and others are the same as Embodiment 1.
[0048] This embodiment provides a specific example, t1=1s, t2=4s, when the instrument is powered on, if the LAN reset button is not pressed, it will keep this state, if it is pressed, FPGA2 will start counting internally, At this time, the LAN status indicator 4 remains in the state before being pressed; if the LAN reset button 1 is pressed for less than 1 second and then let go, the FPGA2 will give up the original count, and the LAN status indicator 4 still maintains the state before being pressed; if If the LAN reset button 1 is pressed for a duration greater than or equal to 1s, the FPGA2 will set the indicator light of the LAN status indicator 4 to go out and continue counting; if the LAN reset button 1 is pressed for a duration greater than or equal to 1s, but not exceeding 4s Open, then FPGA2 sends an interrupt request to embedded processor ...
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