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Method for configuring static storage-type field programmable gate array

A technology of programming logic and static storage, which is applied in the field of field programmable logic gate array, can solve problems such as complicated process, increased hardware usage, and failure to guarantee non-interrupted normal operation of FPGA, and achieves easy analysis, reduced usage, and simple structure Effect

Active Publication Date: 2012-05-30
NO 513 INST THE FIFTH INST OF CHINA AEROSPACE SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, the first solution only supports full reconfiguration of all configuration area data each time, and cannot guarantee that the normal operation of the FPGA will not be interrupted.
The second solution needs to store the configuration information and the information that does not allow repeated writing in two different data files, and two ROM chips are required to save the two data files, which increases the use of hardware, and the analysis process requires The process of parsing the information in the two files is complicated

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  • Method for configuring static storage-type field programmable gate array
  • Method for configuring static storage-type field programmable gate array
  • Method for configuring static storage-type field programmable gate array

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Embodiment Construction

[0031] The present invention divides the data in Xilinx FPGA configuration file into two kinds:

[0032] 1) Shield data. Shielded data is data that is not allowed to be repeatedly written into the configuration area when the internal logic of the FPGA is running, and it corresponds to Xilinx FPGA configuration instructions or RAM resources of the internal hardware structure of Xilinx FPGA. When the FPGA is working, the internal logic will operate these RAM resources, and writing to these RAM resources during dynamic refresh will change the operating state of the internal logic.

[0033] 2) Unshielded data. Unshielded data is the data that can be repeatedly written into the configuration area when the internal logic of Xilinx FPGA is running. It corresponds to the configurable logic block (CLB) and wiring resources of the internal hardware structure of Xilinx FPGA. These resources will not change when the internal logic of Xilinx FPGA is running. state, dynamic refresh can re...

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Abstract

The invention discloses a method for configuring a static storage-type field programmable gate array (FPGA). The method comprises the following steps of: storing a data frame comprising configuration frame data, corresponding shielding information and a data type in a configuration file; during dynamic refreshing operation, reading the data frames from a new configuration file by a logical control circuit frame by frame, filtering off the data frame which is prohibited from repeatedly writing according to the shielding information in the data frame, only restoring the data frame allowable forrepeatedly writing into original FPGA configuration frame data, and writing the data into an FPGA configuration region; during writing, if the data type of the data frame is an instruction, directly writing, and if the data type of the data frame is data, writing the data and further filling redundant data to FPGA. The method can avoid an FPGA-embedded logical working state from being altered when the data in the configuration region is circularly and repeatedly refreshed.

Description

technical field [0001] The invention relates to the technical field of Field Programmable Logic Gate Array (FPGA), in particular to a configuration method of a static storage FPGA. Background technique [0002] The static memory (SRAM) type FPGA device (hereinafter referred to as Xilinx FPGA) produced by Xilinx Company is running. The logical state is determined by the data in the configuration area. However, in the actual working process of Xilinx FPGA devices, the data in the configuration area of ​​FPGA may be changed due to the interference of the external working environment (such as voltage mutation, wireless pulse interference, high-energy particle impact, etc.), thus affecting the normal operation of FPGA embedded logic. [0003] At present, a solution to ensure the correctness of the data in the configuration area is as follows: figure 1 As shown, an external control circuit is used to cyclically reconfigure the configuration data stored in the configuration file o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/413
Inventor 童亚钦辛明瑞曲志超牟文秀
Owner NO 513 INST THE FIFTH INST OF CHINA AEROSPACE SCI & TECH