54results about How to "Simplify Logic Design" patented technology

The invention relates to a floating point addition device based on complement rounding, which supports the floating point addition operation and the floating point subtraction operation. The floatingpoint addition device comprises an exponent adder, a mantissa shifter, a mantissa operand preparation logic unit, a mantissa adder, a rounding judgment logic unit and a rounding adder, wherein the mantissa operand preparation logic unit is used for processing the mantissa operand according to sign bits and the exponent difference of the first floating point operand and the second floating point operand, the rounding judgment logic unit is used for executing the uniform rounding judgment on a mantissa addition result, judging the positive and the negative of the mantissa sum according to the highest bit output by the mantissa adder, determining a constant bit for the rounding judgment according to the highest four bits output by the mantissa adder, and unifying original code rounding plus 1judgment logic and complement rounding plus 0 judgment logic; and the rounding adder is used for rounding the mantissa addition result of the floating point and finishing the code extraction and complement operation to the mantissa sum. The invention has the uniform mechanism, avoids the special complex mantissa operand preparation and rounding judgment logic of the floating point addition, and reduces the logic complexity.

The invention provides a step counting method based on autocorrecting computing which comprises the following steps: collecting N three-axis acceleration data in a current time window by a three-axis acceleration sensor of a pedometer, calculating the module values of the N three-axis acceleration data and storing the calculated module values; collecting and calculating the module values of N three-axis acceleration data in a next time window, and taking the first L module values to be put behind the N module values to obtain N+L merged data, denoting the N+L merged data as sample data x (n); performing filtering and autocorrecting computing on the sample data x (n) to detect the number of wave crests of the sample data x (n); taking the number of wave crests as the step number detected in the current time window, and adding the step number and the current total step number together to obtain new current total step number; taking the next time window of the current time window as a new current time window and repeating the steps until the movement course is finished. According to the step counting method based on autocorrecting computing provided by the invention, through autocorrecting computing, the periodic features of periodic signals are highlighted in signals containing a great deal of noise, and the effective step number is detected according to the counted number of crest values of autocorrelation function, and the step counting accuracy is effectively improved.

The invention relates to a method for achieving automatic adjustment of parameters of the Ethernet based on a PRBS, and the method comprises the steps: enabling PHY chips of a receiving end and a transmitting end to start a function of PRBS, and enabling the code patterns of the PRBS of the two PHY chips to remain the same; enabling the transmitting end to transmit a PRBS code stream to the receiving end; reading the error rate of the PRBS of the receiving end, and generating an error rate graph; analyzing the generated error rate graph, and selecting an optimal parameter; and enabling the optimal parameter to be stored and written in a register. The method can achieve the parameter adjustment of an Ethernet port in different application situations, and the function of parameter adjustment can be integrated in application layer software. Moreover, there is no need for other testing tools. The parameter selection of all ports can be achieved through the built-in PRBS transmitters and receivers in the PHY chips. In addition, the method is simple in operation, and the whole process of parameter selection can be completed through one instruction or key. Therefore, the method is flexible and convenient, is simple in software design logic, is convenient to transplant, is high in applicability, and is wider in application range.

System and method of write deskew training for ×4 mode memory control interface configurations. Write leveling logic in the memory controller is adjusted to obtain a write leveling setting for delaying both first and second strobe signals associated with a byte. The adjustment is based on feedback of first set of bits of a byte and irrespective of the feedback of the second set of bits of the byte. The write leveling logic is then anchored at the write leveling setting, and a deskew delay line for the second strobe signal is adjusted to obtain a first deskew setting based on the feedback of the second set of bits. Thus, in write operations, the write leveling setting can be common within the byte even the two strobe signals are transmitted to or received from two different memory storage devices.

The invention relates to the technical field of computers, in particular to a hardware driving device and method, a chip and a non-transient computer readable storage medium. The hardware driving device comprises a service logic layer used for sending a component driving request; The component layer is used for selecting and executing a component according to the component driving request so as togenerate an interface calling instruction; The interface layer is used for calling an application programming interface corresponding to the component according to the interface calling instruction;And the hardware driving layer comprises a hardware driving program corresponding to the assembly, and the hardware driving layer is used for executing the hardware driving program according to a calling result of the application programming interface. Therefore, the logic design of the service logic layer is simplified, the service logic layer can promote the component layer to select and executethe corresponding component only by sending the component driving request according to the service requirement, so that the driving of the bottom hardware is completed, the coupling degree between different layers can be reduced, and the portability and the function clipping property of a product are improved.

The invention provides an implementation method for updating firmware in integrated circuit design, namely a method for realizing quick downloading and updating of the firmware by using an I2C (Inter-Integrated Circuit) bus. 1 is automatically added to an address of a program memory during firmware data transmission by configuring a starting address of the I2C bus program memory before firmware data transmission without additionally transmitting address information of the program memory every time when a piece of byte data is transmitted. Space occupied by a register in design can be reduced, design logic can be simplified, single and continuous data transmission can be supported, data transmission efficiency can be effectively increased, and application requirements can be met. The method is extremely suitable for application environments of smaller software design scales or minor software modification.

A branch transfer predict method includes the following steps: a) when the system meets with a branch transfer instruction, it gets the preset order computing value from PC to get historical recording from global history record b) to split join to new global record by IC and the historical record in utilizing strict control of the operation system to the system space and user space c) the new global record replaces the global historical record in traditional global historical predict method to help PC for branch prediction.

System and method of read deskew training for ×4 mode memory control interface configurations. A read deskew training process includes aligning the two strobe signals serving one byte before deskewing the data bits against their corresponding strobe signals. A deskew setting of a variable delay line associated with the second strobe signal is adjusted to align the second strobe signal with reference to the first strobe signal. By aligning the two strobe signals with respect to each other, the read leveling settings can be common within the byte even the two DQS signals are transmitted to or received from two different memory storage devices.

The present invention includes control module and cache module, wherein said cache module divided into plurality of BANK spaces; control module used for receiving outer read-write signal, controlling data writing/reading out cache module every BANK, and configuring inner BANK of cache module. Said control module also includes writing interface module, interface module, parameter configuring module, wherein writing interface module used for receiving outer write data signal and controlling data writing cache module BANK; read interface module used for receiving outer read data signal, controlling data reading out cache module BANK; parameter configuring module used for transferring configuration parameter to cache module to proceed configuring and transferring configuration parameter to writing interface module and read interface module. The present invention can simplify outside managing to buffer zone, and to make the external interface not concerning buffer zone inner BANK structure.

The invention provides an isolation control circuit. The isolation control circuit, an isolation unit and a to-be-switched-off region are integrated in a same chip. The isolation control circuit is electrically connected with the isolation unit and the to-be-switched-off region; the isolation control circuit comprises a detection class connected to the to-be-switched-off region; and the detection class detects the voltage change of the to-be-switched-off power supply in the to-be-switched-off region and outputs stable switch-off or switch-on signals to the enabling end of the isolation unit according to the voltage change of the to-be-switched-off power supply.

The embodiment of the invention discloses an e-commerce platform settlement method and device, a storage medium and settlement equipment. The method comprises the steps that multiple amount interaction records are acquired, and the amount interaction records comprise expense types; determining a fund direction and a business direction corresponding to each amount interaction record according to the expense type, the fund direction being used for representing an expense flow direction of the expense type on the e-commerce platform, and the business direction being an expense flow direction defined for the expense type according to business requirements; and for each amount interaction record involved in the to-be-settled type, calculating a settlement amount according to the fund directionand the business direction of each amount interaction record. According to the embodiment of the invention, by adopting the technical scheme, the design logic of the settlement amount is simplified, the calculation of the settlement amount can be carried out in response to various different settlement types, and the calculation of the settlement amount and the flexible decoupling of a service layer can be realized through the fund direction and the service direction of the amount interaction record.

The invention relates to a management and control method and system for controlling a GPIO of a set-top box LED. The method comprises the following steps: defining LED attributes and control attributes of the GPIO in advance, then packaging the defined attributes in a preset control variable, sending the packaged control variable to an Hal layer for analysis, initializing the GPIO through the defined attributes, and when an application layer operates the LED, performing management and control on the GPIO by the Hal layer by fast inquiry according to the defined attributes so as to accomplish the operation of the LED. The management and control of the GPIO are very simple and flexible. As the necessary LED attributes and control attributes of the GPIO are defined in advance, when the GPIO controlling the LED changes, only the defined attributes are modified on a Board layer and are sent to the Hal layer for analysis, the logic design is simple, the repetitive work of the Hal layer to continuously set the GPIO is relieved, the CPU processing efficiency is improved, and the control problem of the LED is avoided.

The invention provides a photoetching machine control system and method. The control system comprises a system control card, a motion control card, a data interface card, an exchange card, a multi-channel power amplification controller, a motor driver, a sensor signal board, a position measurement unit and an upper computer. According to the invention, the motion precision and speed of a motion platform motor can be improved, and electromagnetic interference is reduced.

The invention discloses a real-time control system of a magnetic suspension electric main shaft and the magnetic suspension electric main shaft. The system comprises an upper debugging machine and a control circuit; the control circuit comprises a controller, a current driving module, a current sensor and a sampling module; an input end of the current sensor is used for acquiring coil current of the magnetic suspension electric main shaft; a first input end of the sampling module is connected to an output end of the current sensor, and a second input end is used for acquiring position signalsof the magnetic suspension electric main shaft; an input end of the controller is connected to an output end of the sampling module, a parameter input end is connected to a parameter output end of theupper debugging machine, and a state output end is connected to a state input end of the upper debugging machine; and an input end of the current driving module is connected to an output end of the controller, and an output end is used for driving a coil of the magnetic suspension electric main shaft. The system can improve the control instantaneity and reliability, realizes online testing and adjustment of internal parameters thereof, and meanwhile, guarantees low cost.

The invention relates to an unattended plate blank warehouse intelligent tracking management control device. The control device comprises an operation interface module, a plate blank warehouse positioning module, an inventory information module, a plate blank warehouse-in module, a plate blank warehouse-out module, a plate blank displacement module, a plate blank information statistics module anda travelling crane control module. According to the technical scheme of the unattended plate blank warehouse intelligent tracking management control device, position-limiting switches are installed atrows and columns of a plate blank warehouse, and accurate positioning of a travelling crane is realized; and the plate blank warehouse is designed into a two-dimensional matrix type, a warehouse-in plate stacking table and a warehouse-out trolley are taken as one point of a two-dimensional matrix correspondingly, the logical design of the whole plate blank warehouse including the plate stacking table and the warehouse-out trolley is simplified, and the work efficiency is greatly improved.

The invention discloses a chip implementation method of default strategy routing and a chip processing method and device of a data message. A search matching keyword of the default strategy routing isconfigured to at least comprise a source IP address and a routing matching state, and the routing matching state is obtained according to a search result after a network chip performs routing search;the matching priority of the default policy routing is less than the matching priority of the clear routing. The default strategy routing is realized by enhancing the matching capability of the ACL matching keyword, and the normal access between the private network server and the public network server can be met by deploying the Default PBR on the data center exit gateway equipment on the premiseof not influencing the chip design of the existing routing and PBR technology.

The invention discloses a DPRAM two-side synchronization system and method based on an FPGA, the system comprises a mainboard and an FPGA daughter board, and the FPGA daughter board is provided with a DPRAM, an A-B synchronization module, a B-A synchronization module and a logic module. The method has the advantages that read-write synchronization of the A port and the B port is almost 100%, logic design is simple, effectiveness is high, and the method is not affected by data invariability and a 0 value.