Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware

A technology for coordinating processing and reconfiguring systems, applied in the direction of data processing power supply, etc., can solve the problems of increased power consumption of reconfigurable systems, and achieve the effect of reducing overhead

Inactive Publication Date: 2010-09-15
HANGZHOU DIANZI UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Since hardware resource utilization and system processing time are the main factors determining the power consumption of a reconfigurable system, the above-mentioned reconfigurable hardware and microprocessors have their own shortcomings and advantages in performing different comp...

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  • Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware
  • Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware
  • Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware

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Embodiment Construction

[0051] The method of the invention is proposed in combination with the reconfigurable technology of FPGA and the idea of ​​software and hardware coordination processing. The purpose is to use hardware and software to coordinate scheduling and deal with the energy efficiency of the embedded system during the operation of the local dynamic reconfigurable system, that is, the purpose is to reduce the energy consumption of the reconfigurable embedded system. In this embodiment, a given application is divided into software and hardware processing functions, the software tasks are stored in the internal memory, and the hardware tasks are stored in the external memory (such as a CF card), and the tasks are used to process the local energy optimal Scheduling directives to select software processing or hardware processing. The hardware task configuration storage is loaded into the corresponding area of ​​FPFA through the internal configuration interface.

[0052] The concrete implemen...

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Abstract

The invention relates to a method for managing energy of a local dynamic reconfigurable system by coordinatively processing software and hardware. The conventional reconfigurable system has a high energy efficiency ratio. The method comprises the following steps of: performing task partitioning on application according to functional modules and establishing corresponding software task and hardware task; acquiring the power consumption of processing the software task and the hardware task, the time of processing the software task and the hardware task and the hardware task configuration time, and selecting the software task and the hardware task according to the principle of local energy optimum; constructing a directed acyclic graph of the application according to the relation constraint between the software task and the hardware task, and calculating the task priority level; and finally, coordinatively processing the software task and the hardware task. Due to the adoption of the method, an application example which is operated on a reconfigurable system of a dynamic part and comprises a plurality of tasks can realize effective energy management, so that the reconfigurable system of the dynamic part processes the application example and reduces energy consumption.

Description

technical field [0001] The invention belongs to the field of embedded systems, and relates to a field programmable gate array local dynamic reconfigurable system, in particular to an energy management method for a local dynamic reconfigurable system with software and hardware coordinated processing. Background technique [0002] With the emergence of FPGA reconfigurable technology, the traditional embedded design method has been greatly changed. Reconfigurable computing, as a new computing model in the space-time domain, has broad application prospects in the field of embedded and high-performance computing. It has become the development trend of the current embedded system. The development of partial dynamic reconfigurable technology represents a new reconfigurable design concept, mostly composed of microprocessors and reconfigurable hardware. Reconfigurable hardware can use FPGA fine-grained logic units, or specific The coarse-grained module of functions makes the executi...

Claims

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Application Information

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IPC IPC(8): G06F1/32
Inventor 高志刚戴国骏陈峰张佳芳薛刚刚
Owner HANGZHOU DIANZI UNIV
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