Chip stacking package structure and manufacture method thereof

Abstract

The invention discloses a chip stacking package structure. The structure comprises a plurality of chip groups, a radiating device, a substrate, a circuit board and a plurality of solder balls, wherein the chip groups are stacked together, and each chip group comprises a radiation structure and a chip; the radiating structure comprises a chip accommodating groove, a plurality of through holes which are distributed in the chip accommodating groove and an extending part which extends outward from the chip accommodating groove; the chips are arranged in the chip accommodating groove, and are provided with a plurality of bumps; each bump is correspondingly arranged in one through hole of the radiating structure; the extending part of the radiating structure of each chip group is contacted with the extending part of the radiating structure of the adjacent chip group; the radiation device is positioned on the top of the chip group; the substrate is positioned at the bottom of the chip group; the circuit board is positioned under the substrate; and the solder balls are positioned between the circuit board and the substrate. The invention also provides a method for manufacturing the chip stacking package structure.

Description

technical field [0001] The invention relates to a chip stack package structure and a manufacturing method thereof. Background technique [0002] In today's information society, users are pursuing high-speed, high-quality, and multi-functional electronic products. As far as product appearance is concerned, the design of electronic products is moving towards the trend of light, thin, short and small. In order to achieve the above purpose, a multi-chip package module has recently been developed, that is, a plurality of chips with different functions or the same function are packaged together on the same carrier (carrier), and the carrier is such as a substrate or a lead frame, and It is electrically connected with the external circuit through the carrier. Therefore, the multi-chip packaging module has faster transmission speed, shorter transmission path and better electrical characteristics, and further reduces the size and area of ​​the chip packaging structure, thus making ...

AI Technical Summary

Problems solved by technology

[0004] However, when the chip 110 is in operation, if heat is generated on a specific area of ​​the chip 110, most of the heat energy is dissipated laterally through the chip 110 itself, and in the vertical direction due to the air between the chip 110 and the bump 130 The heat dissipation ability of the is poor, so it forms a large thermal resistance

It is easy to generate a hot spot (hot spot) with a higher temperature on the chip 110, and the hot spot is likely to cause overheating and damage the chip 110 and generate thermal stress on the bump 130, so as to affect the reliability of the chip stack package structure 100

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