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Implementation method of area-compact arithmetic hardware for wireless local area network

A wireless local area network and hardware implementation technology, applied in the direction of encryption devices with shift registers/memory, etc., can solve the problems of large circuit implementation area and power consumption, unsatisfactory operation speed, and restrictions on encryption and decryption methods, etc., to reduce the implementation Small area, easy to realize, and beneficial to the effect of verification

Active Publication Date: 2013-09-25
苏州国芯科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because the data is exposed to the air during transmission, it is easy to be intercepted by people with ulterior motives
[0003] At present, in the implementation methods of existing algorithms, most of them are realized by software method, which is simple and convenient, but its operation speed is not very ideal, it is difficult to meet the real-time needs, and the hardware implementation method has a large hardware overhead. The cost is too high, the circuit implementation area and power consumption are insufficient, so for some environments with high area requirements, such as the application of smart cards, the use of existing encryption and decryption methods is greatly restricted

Method used

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  • Implementation method of area-compact arithmetic hardware for wireless local area network
  • Implementation method of area-compact arithmetic hardware for wireless local area network
  • Implementation method of area-compact arithmetic hardware for wireless local area network

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Embodiment

[0039]Embodiment: a kind of compact algorithm hardware implementation method for wireless local area network comprises the following steps:

[0040] Encryption process:

[0041] Step 1: Divide the plaintext code into 4 code words in units of words, and divide the master key code into 4 key words in units of words.

[0042] Step 2. XOR the 1st to 3rd key word in the master key with a constant, then perform reversible transformation, and then XOR with the 0th key word to generate a word-length For the first round of keys, move the 1st to 3rd key word forward to the position of the 0th to 2nd key word, and move the first round key to the 3rd position The location of the key word.

[0043] Step 3: XOR the first-round key with the plaintext code from the 1st to 3rd coded word, perform reversible transformation, and then XOR with the 0th coded word to generate a word-length The first round of cipher text, then move the first to the third code word to the position of the 0th to th...

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PUM

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Abstract

The invention relates to an implementation method of area-compact arithmetic hardware for a wireless local area network. The method comprises the following steps of: dividing a plaintext code into four coded words by taking words as units, and dividing a secret key code into four secret key words by taking words as units; operating the secret key words from a first bit to a third bit and a constant; performing WXOR operation on the secret key word of a zeroth bit to generate a first round secret key with one word length; shifting the secret key words from the first bit to the third bit to the positions of the secret key words from the zeroth bit to the second bit forwards; shifting the first round secret key to the position of the secret key word of the third bit; operating the first round secret key and the coded words from the first bit to the third bit, and performing the WXOR operation on the coded word of the zeroth bit to generate a first round ciphertext word with one word length; shifting the coded words from the first bit to the third bit to the positions of the coded words from the zeroth bit to the second bit forwards; and shifting the first round ciphertext word to the position of the coded word of the third bit. The method of the arithmetic hardware is implemented with a compact area and greatly reduces circuit areas for realizing the arithmetic hardware on the premise of ensuring algorithm implementation efficiency.

Description

technical field [0001] The invention relates to a hardware implementation method of a packet encryption and decryption algorithm, in particular to an encryption and decryption method for a wireless local area network. Background technique [0002] With the wide application of WLAN, its security issues are becoming more and more prominent. For wireless local area networks, it is very vulnerable in terms of security, because the transmission rate can reach 11M, and the coverage range is up to 100 meters. It is its fast transmission speed and wide coverage that make it very vulnerable in terms of security. Because the data is exposed in the air during transmission, it is easy to be intercepted by people with ulterior motives. [0003] At present, most of the existing algorithms are realized by software, which is simple and convenient, but its calculation speed is not ideal, and it is difficult to meet the real-time needs, while the hardware implementation has a large hardware...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/06
Inventor 郑茳肖佐楠林雄鑫钟名富
Owner 苏州国芯科技股份有限公司
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