Test structure and test method of semiconductor device
A technology of test structure and test method, which is applied in the direction of semiconductor/solid-state device testing/measurement, semiconductor devices, semiconductor/solid-state device components, etc., and can solve the problem of large error in wire resistance
Active Publication Date: 2012-08-22
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0006] Since the test wire is usually set as the wire with the smallest width in the semiconductor device, only the resistance of the wire with the smallest width in the semiconductor device can be tested, but the resistance of the wire with a larger width in the semiconductor device cannot be tested, so it can only be estimated , but the resistance error of the wire with a larger width obtained in this way is larger
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[0041] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0042] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.
[0043] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged accordi...
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The invention discloses a test structure and a test method of a semiconductor device. The test structure comprises a semiconductor substrate and a test pattern, wherein the semiconductor substrate is positioned in a wafer test region; the test pattern is positioned on the semiconductor substrate and comprises a narrow test lead, a gap zone and a wide test lead, wherein the outline of the wide test lead is rectangular, the gap zone penetrates through two short edges of the rectangle along the long edge direction of the rectangle, the narrow test lead is positioned in the gap zone and faces to the central direction of the rectangle along the short edge of the rectangle, and the thickness of the test pattern decreases progressively. The resistance of a lead with a larger width in the semiconductor device can be accurately obtained by using the test structure.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a test structure and a test method for a semiconductor device. Background technique [0002] In the semiconductor manufacturing process, after the semiconductor device unit is manufactured, it is necessary to use a conductive layer for wiring, such as using metal layer wiring to connect semiconductor device units, such as connecting the gate and source / drain of the same semiconductor device unit. The electrodes of the semiconductor device units are connected, or the electrodes of the semiconductor device units of different layers are interconnected to form a semiconductor device. Since the thickness and length of the wire formed by the conductive layer will affect the resistance value of the wire, and the resistance value of the wire will affect the performance of the semiconductor device, it is usually necessary to measure the resistance value of the wire of ...
Claims
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IPC IPC(8): H01L23/544H01L21/66
Inventor 陈文磊
Owner SEMICON MFG INT (SHANGHAI) CORP