1767results about How to "Improve processing yield" patented technology

A plasma processing apparatus wherein a layer structure consisting of plural layers formed in stack one upon another on a semiconductor wafer placed on the sample holder located in the process chamber, is etched with plasma generated in the process chamber by supplying high frequency power to the electrode disposed in the sample holder, the apparatus comprising a ring-shaped electrode disposed above the electrode and around the periphery of the top portion of the sample holder, an outer circumferential ring of dielectric material disposed above the ring-shaped electrode and opposite to the plasma, and a power source for supplying power at different values to the ring-shaped electrode depending on the sorts of layers of the layer structure.

The invention provides apparatus and methods for processing substrates using a hot-spot library.

Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.

A cold-cathode tube has hitherto been used as a backlight for supplying illumination to a liquid crystal television but recently, light emitting diode pieces have been used for a backlight of a large-size liquid crystal television. For the purpose of improving the emission efficiency, flip chip mounting of the light emitting diode piece is advantageous but the mounting yield is restricted by the piece size, electrode structure and wire pattern structure, facing situations having difficulties in realizing simplified mounting and reduction of costs of members. In a liquid crystal display apparatus having a liquid crystal panel, an optical system and a light source, the light source includes a light emitting element structure having positive and negative electrodes, at least one of them being plural, and wires mounted to the positive and negative electrodes through flip chip mounting by making electrical correspondence to individual regions of the positive and negative electrodes.

A process is described for preparing 3-pentenenitrile, characterized by the following process steps:

• (a) reacting 1,3-butadiene with hydrogen cyanide over at least one catalyst to obtain a stream 1 which comprises 3-pentenenitrile, 2-methyl-3-butenenitrile, the at least one catalyst and 1,3-butadiene,
• (b) distilling stream 1 in a column to obtain a high-1,3-butadiene stream 2 as the top product and a low-1,3-butadiene stream 3 as the bottom product which comprises 3-pentenenitrile, the at least one catalyst and 2-methyl-3-butenenitrile,
• (c) distilling stream 3 in a column to obtain a stream 4 as the top product which comprises 1,3-butadiene, a stream 5 which comprises 3-pentenenitrile and 2-methyl-3-butenenitrile at a side draw of the column, and a stream 6 as the bottom product which comprises the at least one catalyst,
• (d) distilling stream 5 to obtain a stream 7 as the top product which comprises 2-methyl-3-butenenitrile, and a stream 8 as the bottom product which comprises 3-pentenenitrile.

A manufacturing method of a semiconductor device includes the following steps. First, a substrate is provided. At least one sacrificial gate structure is formed on the substrate, at least one diffusion region is formed in the substrate at each of two sides of the sacrificial gate structure, and a first inter-layer dielectric layer is formed to cover the diffusion region. A gate recess is then formed in the sacrificial gate structure. A first diffusion contact hole is then formed in the first inter-layer dielectric layer and at least partially exposes the diffusion region. A metal layer is subsequently formed in the gate recess and the first diffusion contact hole.

The disclosure describes methods of synthesis of phosphonate ester compounds. The methods according to the disclosure allow for large-scale preparation of phosphonate ester compounds having high purity and stability. Also disclosed are morphic forms of phosphonate ester compounds.

An optical interference display unit, at least comprises a light-incidence electrode and a light-reflection electrode located on a transparent substrate. The light-incidence electrode at least comprises a transparent conductive layer and a dielectric layer. The light-reflection electrode at least comprises an absorption layer and a reflective layer.

Optical fibers 301-308 are housed in V-grooves formed on a V-block 20 with end faces 311-318 flush with an end face 22 of the V-block 20. Therefore, when the optical fibers 301-308 are connected to optical waveguides, the V-block 20 suppresses the oscillation of the end faces 311-318 of the optical fibers 301-308. This structure increases the alignment precision and increases the intensity of the optical fibers 301-308.

The embodiment of the invention provides a through hole structure, a printed circuit board and a manufacture method of the through hole structure, and relates to the field of printed circuit boards. According to the invention, the density of an outgoing line is increased, the transmission capacity of a signal is increased, the manufacture difficulty is lowered, and the product reliability is improved. The through hole structure is surrounded by hole walls and comprises at least two through hole parts which are formed through division along the axial direction of the through hole structure and at least one step part which is formed through division along the axial direction, wherein the at least two through hole parts are surrounded by the hole walls, the at least one step part is surrounded by the hole walls, each step part of the at least one step part is located between two adjacent through hole parts of the at least two through hole parts and is connected with the two adjacent through hole parts; and the hole walls of the at least two through hole parts and the hole walls of the at least one step part at least comprise one insulated hole wall and one metalized hole wall. The example of the invention is applied to manufacturing the printed circuit board.

The invention provides apparatus and methods for processing substrates using pooled statistically based variance data. The statistically based variance data can include Pooled Polymer De-protection Variance (PPDV) data that can be used to determine micro-bridging defect data, LER defect data, and LWR defect data.

Provided are a bolometer structure, an infrared detection pixel employing the bolometer structure, and a method of fabricating the infrared detection pixel.

The infrared detection pixel includes a substrate including a read-out integrated circuit (ROIC) and on which a reflection layer for reflecting infrared light is stacked, a bolometer structure formed to be spaced apart from the substrate and including a temperature-sensitive resistive layer, a first metal layer formed in a pattern on one surface of the temperature-sensitive resistive layer, a second metal layer formed in a pattern complementary to the pattern of the first metal layer on the other surface of the temperature-sensitive resistive layer in order to complementarily absorb infrared light, and an insulating layer formed between the temperature-sensitive resistive layer and the first metal layer, and a metal pad receiving a change in resistance of the temperature-sensitive resistive layer according to infrared light absorbed by the first metal layer and the second metal layer from the second metal layer, and transferring the change in resistance to the ROIC.

Thus, it is possible to improve responsivity, and implement a simple bolometer structure robust against stress. Consequently, process yield can be improved, and the volume, weight, price, etc., of application products can be reduced by reducing the volume of a bolometer structure.

The invention provides a flexible display device and a fabricating method thereof and relates to the fabricating field of a display. The fabricating method comprises: providing a rigid carrier plate; forming a protective pattern on the rigid carrier plate; forming a flexible supporting base substrate, which comprises a reserved area and a non-reserved area and covers the protective pattern, on the rigid carrier plate where the protective pattern is formed; fabricating a display device of the flexible display device on the reserved area of the flexible supporting base substrate; cutting the flexible supporting base substrate to separate the reserved area of the flexible supporting base substrate from the non-reserved area; enabling a cutting trajectory to fall into an area where the protective pattern is located; and stripping the flexible supporting base substrate, after being cut, off the rigid carrier plate. According to the scheme of the invention, the protective pattern is disposed on the cutting trajectory corresponding to the rigid carrier plate, the rigid carrier plate is prevented from damage, which is caused by cutting, through the protective pattern, and then subsequent fabricating of the flexible display device is prevented from being influenced after the rigid carrier plate is cracked.

An array substrate for a liquid crystal display device, including: a substrate; a gate electrode on the substrate; and a gate insulating layer including an organic matrix of an organic material and an additive that increases a dielectric constant of the gate insulating layer.