30 results about "Readout integrated circuit" patented technology

Systems and methods are provided for time resolution of signals produced by the emission of energy. More particularly, systems and methods are provided for measuring distance using photons propagating in a scattering medium to produce multi-dimensional, measurements of objects in a media and / or the media itself by virtue of the character of light spatially scattered and absorbed in the media resulting from the transmission of light into the media, such transmitted light having some temporal character that distinguishes it from background light, e.g., ambient sources. A method for obtaining terrestrial LiDAR data generally includes: providing a LiDAR system moving traverse to a ground canopy; emitting light pulses from the LiDAR system toward the ground canopy and terrain such that the light pulses reflect therefrom; and receiving the reflected light pulses at the LiDAR system; wherein the LiDAR system includes a monolithic module comprising a photonic device, a sampling module, a digitizing module, and a readout integrated circuit (ROIC).

The invention relates to the technical field of tactile sensors, in particular to a CMOS (complementary metal oxide semiconductor) compatible high-density tactile sensor array and a preparation method thereof, and the CMOS compatible high-density tactile sensor array comprises a micro / nano structure pressure sensitive film which comprises a conductive network and an elastic polymer substrate and is used for generating a deformation signal and a current change signal; the CMOS readout integrated circuit is electrically connected with the micro / nano structure pressure sensitive film, the pixel array of the CMOS readout integrated circuit is 640 * 512, the pixel size is 15 * 15 [mu] m, and each pixel comprises a central pixel electrode and a surrounding grounding grid and is used for collecting / measuring the resistance change of the micro / nano structure pressure sensitive film; the signal processing circuit is electrically connected with the CMOS readout integrated circuit and used for processing the tactile signal data, and the problems that in the prior art, the resolution ratio is limited, sensitivity is insufficient, and the integration degree is low are solved.

The present invention relates to the technical field of thermal imaging of mid-infrared focal plane detectors, and more particularly relates to a method for preparing a mid-infrared focal plane detector based on Sn-doped PbSe quantum dots. The mid-infrared focal plane detector is prepared on a readout integrated circuit (ROIC) substrate, and is composed of an Au bottom electrode, a PbS hole transport layer, a Sn-doped PbSe photosensitive layer, and a PIN heterojunction of a ZnO electron transport layer sequentially constructed by an ion beam sputtering method, a spin-coating method, a spin-coating method, and an ion beam sputtering method, respectively, and an indium tin oxide (ITO) top electrode finally evaporated by an ion beam sputtering method.

A touch circuit includes a micro control circuit and a readout integrated circuit configured to communicate with the micro control circuit though a selection signal line, a clock signal line, a master output slave input (MOSI) signal line, and a master input slate output (MISO) signal line. In a first period, the readout integrated circuit generates a first interrupt request signal representing completion of touch sensing, and transfers the first interrupt request signal to the micro control circuit through the MISO signal line. In a second period which differs from the first period, the readout integrated circuit generates a second interrupt request signal, representing a kind of error and whether an operation state thereof is normal, and transfers the second interrupt request signal to the micro control circuit through the MOSI signal line.

The invention provides a monolithic three-dimensional integrated photoelectric detector and a preparation method thereof. The preparation method comprises the following steps: forming an isolation passivation layer on a readout integrated circuit serving as a substrate of the photoelectric detector; forming a source conductive through hole, a drain conductive through hole and a bottom gate contact hole in the isolation passivation layer; a conductive material is deposited and planarized, the source electrode conductive through hole, the drain electrode conductive through hole and the bottom gate contact hole are filled with the conductive material, the conductive material in the source electrode conductive through hole forms a source electrode conductive channel, the conductive material in the drain electrode conductive through hole forms a drain electrode conductive channel, and the conductive material in the bottom gate contact hole forms a bottom gate electrode layer; forming a bottom gate dielectric layer on the planarized surface, and forming a channel layer on the bottom gate dielectric layer; forming a source electrode and a drain electrode, wherein the source electrode and the drain electrode are electrically connected with the connecting port of the read-out integrated circuit through a source electrode conductive channel and a drain electrode conductive channel respectively; and forming a top gate structure which comprises a top gate dielectric layer and a photosensitive layer.

The present invention relates to a light detection device array and, more specifically, to a light detection device array in which each light detection device can be individually controlled and which can reduce ROIC internal complexity and manufacturing costs. The light detection device array according to an embodiment of the present invention comprises: a substrate; a plurality of light detection devices arranged in M rows (M is a natural number greater than 2) and two columns on the substrate; a quenching resistor disposed on the substrate, electrically connected to a contact electrode, and including conductive lines having a zigzag or serpentine shape and continuously arranged in the row direction; and a bonding pad disposed on the substrate and configured to be electrically connected to the quenching resistor.

A colloidal quantum dot (CQD) based image sensor. The CQD based image sensor includes a top contact layer, a light absorption layer, a readout integrated circuit (ROIC), and a pixel electrode. The quantum dot film includes colloidal quantum dots. The pixel electrode is positioned between the quantum dot film and the ROIC.

The present invention belongs to the technical field of substrate processing. Disclosed is a substrate processing method for improving the imaging quality of an infrared focal plane hybrid integrated chip. The infrared focal plane hybrid integrated chip is fabricated from an array die and a silicon readout integrated circuit by means of flip-chip bonding using indium bumps; and an epitaxial layer, a substrate / epitaxial layer interface and a substrate are sequentially arranged above the indium bumps along a first direction. The method comprises the following steps: step S1, thinning a substrate, and performing an adhesive and wax removal treatment; step S2, forming a protective layer on an electrode of a silicon readout integrated circuit; step S3, adhering a treated die and a dummy wafer to a glass substrate, and removing the thinned substrate by means of a chemico-mechanical polishing treatment; and step S4, removing, by means of a chemical polishing treatment, the portion of the epitaxial layer that is close to the substrate / epitaxial layer interface and has a set thickness, and performing cleaning. The technical solution has the following beneficial effects: a tellurium-zinc-cadmium substrate is removed by means of chemico-mechanical polishing, thereby reducing the loss rate and overcoming the problem of uneven corrosion; and an epitaxial material close to the substrate / epitaxial layer interface is removed by means of chemical polishing, thereby improving the imaging quality.

Various embodiments are described herein for a sensor device, a method of manufacturing said sensor device, and a camera device constructed using said sensor device. The sensor device includes: a readout integrated circuit; an array of electrical contacts mounted to the readout integrated circuit; a solution processed layer deposited on top of the array of electrical contacts; and a spectral band filter layer deposited on top of the solution processed layer, wherein the spectral band filter layer is optically aligned with the solution processed layer and wherein the readout integrated circuit, the array of electrical contacts and the solution processed layer form together a focal plane array for receiving light from a lens device.

The present invention generally relates to pulse capture electronics (PCE) of an imaging system that provides the ability to interface with, control, and test Read-Out Integrated Circuits (ROIC), and communicate the image data to a computing device for rendering and / or computational processing. The RIS-DC includes a single board signal processing architecture that is combined with a processor board to enable various operational requirements and varying ROICs to be configured to produce an operational imaging system.

To provide a focal plane array (FPA) and a readout integrated circuit (ROIC) suitable for low light level (LLL) imaging.SOLUTION: An imaging system comprises: a focal plane array (FPA) comprising a plurality of photodiodes; a pixel circuitry array (PCA) comprising a plurality of transistors, where an input node of a transistor of the plurality of transistors is connected to each photodiode collection node of the FPA; and biasing circuitry. The biasing circuitry is configured to: selectively bias a first portion of the plurality of transistors into an inactive configuration; reverse-bias a substrate of each transistor of the first portion of the plurality of transistors; selectively bias a second portion of the plurality of transistors into an active configuration; and reverse-bias the shared substrate to a different reverse bias than the reverse bias of each transistor substrate of the first portion of the plurality of transistors.SELECTED DRAWING: Figure 2

A colloidal quantum dot (CQD) based image sensor. The CQD based image sensor includes a top contact layer, a light absorption layer, a readout integrated circuit (ROIC), and a pixel electrode. The quantum dot film includes colloidal quantum dots. The pixel electrode is positioned between the quantum dot film and the ROIC.

This invention discloses a narrow-angle polarization detection integrated chip covering communication frequency bands and its fabrication method, comprising: a top-layer chip, using silicon as a substrate, wherein the silicon has an array of through-holes; an array of through-hole grooves with an insulating layer on the upper surface of the silicon; a multi-dimensional composite metasurface, disposed within the array of through-hole grooves of the insulating layer and in contact with the silicon; silicon through-hole metal connecting pillars, uniformly arrayed within the through-holes of the silicon, and connected to each other through the insulating layer; electrodes, evenly distributed above the insulating layer on the upper surface of the silicon with the array of through-hole grooves of the insulating layer as the center, and in contact with the silicon through-hole metal connecting pillars; and a bottom-layer chip, containing a readout integrated circuit module, connected to the top-layer chip via an indium tin alloy. This invention achieves chip-level ultra-narrow-angle detection, integrates the characteristics of anisotropic trench structures, and expands the detection capability of silicon-based chips across the entire communication frequency band, making it suitable for wafer-level production.

An optoelectronic device includes at least one pixel, each pixel comprising an optical resonator comprising a photodetecting structure confined between a reflective metal layer and a second reflective metal layer; and a readout integrated circuit arranged on a substrate and comprising at least one buried readout electrode dedicated to the pixel and at least one metal or dielectric outer layer. The assembly comprising at least the reflective metal layer and the outer layer of the readout integrated circuit is called a planar assembly structure. The first metal layer is connected to the readout electrode by way of a metal via passing through the optical resonator structure and the planar assembly structure. The metal via is electrically isolated from the photodetecting structure and from the planar assembly structure.

An optoelectronic device includes at least one pixel comprising: a plurality of optical resonators, each optical resonator comprising a photodetecting structure confined between a first reflective metal layer and a second metal layer; and a connection microstructure that is arranged on a support made of dielectric material and is configured to electrically interconnect the second metal layers of the optical resonators belonging to the same pixel; and a readout integrated circuit arranged on a substrate and assembled with the pixel; the readout circuit comprising a buried readout electrode associated with the pixel and a metal or dielectric outer layer. The assembly comprising at least the first metal layer and the outer layer of the readout integrated circuit is called a planar assembly structure. The second metal layers of the resonators of a pixel are connected to the associated readout electrode by way of a metal via connected to the connection microstructure and passing through the support.

An uncooled infrared focal plane array readout integrated circuit (200), and a detector. The readout integrated circuit (200) comprises a pixel circuit module (10) and a readout integrated circuit bias module (30). The pixel circuit module (10) comprises a pixel resistor (13), a correction voltage terminal (VEB), a first node (N1), a pixel bias sub-module (12), and a correction sub-module (11), wherein the pixel bias sub-module (12) is connected to the pixel resistor (13), and the correction sub-module (11) is connected to the correction voltage terminal (VEB), so as to correct a deviation of an output result from the readout integrated circuit (200) caused by a resistance deviation of the pixel resistor (13). The readout integrated circuit bias module (30) comprises a working resistor (R), a bias voltage provision module (33), and a feedback module (32), wherein a connection terminal of the bias voltage provision module (33) is connected to the feedback module (32), and an output end thereof is connected to one end of the working resistor (R); the other end of the working resistor (R) is connected to the first node (N1); the voltage of the bias voltage provision module (33) fluctuates with at least one of a correction voltage (Veb) and a target temperature of the pixel resistor (13); and the feedback module (32) generates a feedback current (I0) which corresponds to the voltage (Vd) of the first node (N1), and provides the feedback current (I0) to the bias voltage provision module (33).

Fabrication of avalanche photodiodes on a first wafer for operation in Geiger mode and integration with read-out integrated circuits (ROICs), fabricated on a second wafer, are described. Photodiode arrays are fabricated using a thin epitaxial layer grown on a semiconductor-on-insulator wafer. Chips are diced from the first wafer and bump bonded to chips diced from the second wafer.

A touch sensing display apparatus may include touch blocks, touch electrodes in each touch block, a readout integrated circuit (ROIC) for sensing the touch electrodes to obtain touch raw data, and a micro control circuit connected to the ROIC through a serial peripheral interface (SPI). A memory of the ROIC may have a 16-bit row unit storage system. Each of a TX memory and an RX memory of the micro control circuit may have a 32-bit row unit storage system. In a touch period for touch driving, J pieces of SPI data having a 12-bit transfer system corresponding to address and command data for reading the touch raw data may be transferred from the micro control circuit to the ROIC, and K pieces of SPI data having a 12-bit transfer system corresponding to the touch raw data may be transferred from the ROIC to the micro control circuit.

The invention provides a chip infrared spectrometer and a preparation method thereof, and the preparation method comprises the following steps: providing a readout integrated circuit wafer, and forming a plurality of miniature bolometer arrays on the readout integrated circuit wafer to obtain an infrared detector wafer; providing a second wafer, and preparing a filter array on the second wafer to obtain a filter wafer; and bonding the infrared detector wafer and the filter wafer, wherein the units of the micro bolometer array and the units of the filter array are in one-to-one correspondence on an incident light path. A chip infrared spectrometer comprises an infrared detector wafer and a filter wafer, wherein the infrared detector wafer is composed of a readout integrated circuit wafer, a conductive base and a miniature bolometer array. The surface of the filter wafer is a metasurface pattern, and a cavity is formed in the back area of the pattern; the filter wafer is bonded on the infrared detector wafer, the miniature bolometers and the filters are in one-to-one correspondence on an incident light path, and a vacuum sealing cavity is formed on the surface of the infrared detector wafer.

In a described example, an apparatus includes: a photon detector array with a first signal output pad coupled to a photon detector array pixel; a die carrier comprising a readout integrated circuit (ROIC) die and a conductor layer having conductors that couple a first signal input pad on the conductor layer to an input signal lead of the ROIC die; and the first signal output pad coupled to the first signal input pad.

A focal plane array assembly may include a plurality of subarrays that are electrically isolated. Each of the plurality of subarrays may include a one or more detectors and one or more readout integrated circuit (ROIC) subarrays coupled to the one or more detectors. Each ROIC subarray may include a plurality of buttable sides and at least one unbuttable side configured to electrically couple to an interposer or a connector for providing an input to or output from the ROIC subarray. The at least one unbuttable side of each detector may include first and second unbuttable sides. The at least one unbuttable side of each ROIC subarray includes additional peripheral circuitry and input / output pads that are coplanar with the ROIC subarray and is non-coplanar with the one or more detectors.

The application belongs to the field of readout integrated circuit, and particularly relates to a kind of pixel level infrared detector readout circuit, aiming at solving the problem that current readout circuit with high precision and large dynamic range is difficult to meet the demand of smaller size of pixel.The application comprises: a timing control circuit for counting the main clock pulse of the entire infrared detector circuit; an integration circuit module of a pixel-in-module for integrating photoelectric current to obtain an integrated voltage, and controlling whether the charge of an integration capacitor is discharged according to the comparison result of the integrated voltage and a reference voltage; a programmable bidirectional counter for counting the output first level to obtain a first count value; a second counter for counting the high level of borrow output of the programmable bidirectional counter at the beginning of the second subframe to obtain a second count value; and an operation module for calculating the operation result from the first count value, a storage value, the second count value and the main clock pulse count result.The application can meet the demand of smaller size of pixel.

A spectroscopic device (110) and a method for obtaining spectroscopic information of at least one object (112) are disclosed. The spectroscopic device (110) includes the following components: i. at least one light source (114) that generates illumination light (116) that illuminates an object (112); ii. at least one detector (128) that detects the detection light (130) from the object (112) and generates at least one detector signal; iii. at least one driving unit (138) for electrically driving the light source (114); iv. at least one multi-channel readout integrated circuit (139), each channel of the multi-channel readout integrated circuit (139) comprising at least one buffered direct injection (BDI) circuit (141), configured for readout of a detector signal, the BDI circuit (141) configured to generate at least one information related to an electrically measurable quantity required to drive the light source (114), the multi-channel readout integrated circuit (139) including at least one multi-channel readout application-specific integrated circuit (ASIC) (142), the ASIC (142) configured to synchronously sample the detector signal and the information related to the electrically measurable quantity required to drive the light source (114); and v. At least one evaluation unit (136) for evaluating at least one detector signal generated by the detector (128) and deriving spectroscopic information of the object (112) from the detector signal, wherein the evaluation unit (136) is configured to take into account information regarding electrically measurable quantities required to drive the light source (114) when deriving the spectroscopic information from the detector signal.

An apparatus includes a pixelated photodiode array (PDA). Each pixel in the PDA includes a radiation detector, a memory configured to store a negative bias voltage for the PDA and a nominal breakdown voltage for each pixel in the PDA, and a read out integrated circuit (ROIC) communicatively coupled to the PDA and the memory. The ROIC is configured to read, from the memory, the negative bias voltage for the PDA and the nominal breakdown voltage for each pixel in the PDA, determine a difference between the negative bias voltage for the PDA and the nominal breakdown voltage for each pixel in the PDA, and adjust an arm / disarm bias voltage for each pixel in the PDA based on the difference between the negative bias voltage for the PDA and the nominal breakdown voltage for each pixel in the PDA.

The invention belongs to the technical field of detector front-end reading integrated circuits. The invention provides an in-pixel analog calculation circuit. According to the analog calculation circuit in the pixel, the data size of the source end of the detector can be remarkably reduced, and analog convolution calculation is achieved in an array parallel architecture and used for feature map extraction. Compared with other methods, the data volume output by the pixel array can be reduced, and the larger the convolution step length is, the more significant the reduction of the pixel array output nodes is. Moreover, simulation neural network calculation in a large-array pixel type read-out chip becomes possible, and when the array is continuously increased, the size of the super-pixel circuit can be properly increased, so that the pressure of the number of analog voltage nodes output by the array and the complexity of interconnection lines are reduced.

To provide a radiation image photographing device capable of suppressing misdetection of an electric noise as irradiation with radiations because of vibration of a radiation detection panel.SOLUTION: A radiation image photographing device comprises: an internal module 100 having a radiation detection panel 11, an electric circuit board 15, and a support 12; and a casing 10 for housing the internal module 100. It also comprises: a COF 16 for connecting the radiation detection panel 11 and the electric circuit board 15; and an ROIC (read IC 17) that is provided on the COF 16 and reads a signal from the radiation detection panel 11. The support 12 is formed from a high-stiffness material, and a damping material 19 formed from a viscoelastic material is provided between the ROIC and the casing 10.SELECTED DRAWING: Figure 2

The present invention provides an X-ray detector comprising: a sensor panel which has flexibility; at least one first flexible circuit unit which is attached along a first edge of the sensor panel and has a gate IC mounted therein; at least one second flexible circuit unit which is attached along a second edge of the sensor panel and has a readout IC mounted therein; a third flexible circuit unit which is attached to one end of the first edge; and a main circuit unit which is connected to the third flexible circuit unit and has a timing controller mounted thereon, wherein a gate control signal output from the main circuit unit is provided to the gate IC via the third flexible circuit unit.

A thin-film battery sensor includes a thin-film substrate; a common electrode, a second electrode, and a third electrode on the thin-film substrate; a first resistor on the thin-film substrate and coupled to the common electrode and the second electrode; and a second resistor on the thin-film substrate and coupled to the common electrode and the third electrode. A third resistor can be included that is coupled to the common electrode at one end and a corresponding electrode at another end. Each resistor is configured to function as a heater and / or thermistor to deposit heat onto the battery and detect local temperature variations. A readout integrated circuit (ROIC) is coupled to the sensor to apply a modulated current source and readout temperature modulation amplitude for determining thermal conductivity and thermal diffusivity tensors, which are used for estimation of state of health, state of charge, and state of safety of the battery.

A method for reading out an integrated circuit and determining the distance or speed of an object is provided. The readout integrated circuit includes: a balanced PIN photodiode configured to receive an optical signal and convert the optical signal into a current signal; an optical mixer configured to receive a current signal from the balanced PIN photodiode and convert the current signal into a mixed signal of high frequency and low frequency; a transimpedance amplifier configured to receive the converted current signal from the optical mixer and convert the converted current signal into a voltage signal; a comparator configured to receive the voltage signal and generate a pulse signal from the voltage signal; a master counter configured to receive a master signal corresponding to the pulse signal and count the number of pulses to generate master counter data; a reference counter configured to receive a reference signal and count the number of pulses to generate reference counter data; and an arithmetic logic unit configured to receive the master counter data and the reference counter data and calculate depth information corresponding to the distance to the target.

The utility model discloses a detector which comprises a shell and a hollow closed structure formed by splicing an enclosure frame and a bent plate, the top end wall and the rear side wall of the enclosure frame are provided with openings and cover the bent plate, and the front side wall of the enclosure frame is provided with a through hole for X-rays generated by an X-ray instrument to penetrate through. A bracket for placing a sample is arranged on the inner wall of the front side wall of the enclosure frame at a position opposite to the through hole; the flexible screen is attached to the inner wall of the bent plate; the readout integrated circuit board is fixed on the inner wall of the bent plate and is electrically connected with the flexible screen; and the mainboard is fixed on the enclosure frame and is electrically connected with the read-out integrated circuit board. The detector is more flexible in design, has a wider sample diffraction angle range, not only can adapt to detection of samples in complex shapes, but also can capture diffraction data of the samples at multiple angles in one test, so that the time required for data collection can be shortened, the test efficiency can be improved, and the sample structure can be analyzed more comprehensively; the test precision is improved.