Digital readout method and apparatus

Abstract

A digital focal plane array includes an all-digital readout integrated circuit in combination with a detector array. The readout circuit includes unit cell electronics, orthogonal transfer structures, and data handling structures. The unit cell electronics include an analog to digital converter. Orthogonal transfer structures enable the orthogonal transfer of data among the unit cells. Data handling structures may be configured to operate the digital focal plane array as a data encryptor / decipherer. Data encrypted and deciphered by the digital focal plane array need not be image data.

Description

RELATED APPLICATIONS[0001]This application is a continuation in part of published United States Patent Application 2007 / 0075888, which is hereby incorporated by reference. This application also claims benefit of provisional application entitled FOCAL PLANE ARRAY FOR ON-CHIP DATA PROCESSING, having inventors Michael Kelly, Brian Tyrell, and Curtis Colonero filed Oct. 27, 2006, which is hereby incorporated by reference.GOVERNMENT SPONSORSHIP[0002]1. Field of the Invention[0003]The invention relates to focal plane arrays and, in particular, to signal processing focal plane arrays.[0004]2. Background of the Invention[0005]High performance focal plane array (FPA) applications require wide-area coverage, high signal-to-noise-ratios (SNR), high spatial resolution, and high frame rates in various combinations. Conventional FPAs are not particularly well-suited to satisfying combinations of the above requirements. Conventional FPAs typically provide analog readouts, with the analog signals g...

AI Technical Summary

Benefits of technology

[0007]A digital focal plane array in accordance with the principles of the present invention includes an all-digital readout integrated circuit (also referred to herein, simply, as a readout circuit) in combination with a detector array. The readout circuit includes unit cell electronics, orthogonal transfer structures, and data handling structures. The detector array converts incident photons to an electrically detectable signal. In accordance with the principles of the present invention, the detector elements may be monolithically fabricated photodiodes in a unit cell, a hybridized photodiode array, a hybridized charge coupled device (CCD) detector array, or a linear mode photodiode (APD) array, for example. Each unit cell includes an analog-to-digital converter ADC. In an illustrative embodiment, the ADC is a single-slope ADC that allows for various counting / converting schemes. In accordance with the principles of the present invention, the orthogonal data transfer structure includes shift registers configured to shift conversion data among the various unit cells (for signal processing functions) or off the array (for readout). In accordance with the principles of the present invention, data handling structures may include parallel to serial multiplexers configured to serialize low-rate array data to a lower number of output taps. Data handling may also include logic operations performed prior to multiplexing. Such logic operations may be used, for example, to threshold data for match filtering. A digital focal plane array in accordance with the principles of the present invention may be configured to directly encrypt and decipher image or other data.

Problems solved by technology

Conventional FPAs are not particularly well-suited to satisfying combinations of the above requirements.

Specific analog designs can target (and possibly satisfy) one or more requirement, but fail when simultaneously targeting the most aggressive design parameters for imaging applications, such as long-wave infrared imaging (LWIR) applications.

Fundamental limitations on achievable well depth (with concomitant limitations on capacitor size), and the readout noise floor, limit practical scalability of conventional designs.

Capacitor size limitations require unnecessarily high frame rates to avoid saturating pixels.

Attempting to scale conventional analog technology to meet the most demanding requirements leads to a high-power-consumption FPA with many data output taps.

This in turn leads to a large, massive, and complex sensor system.

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