Blocking-rendering based generation of anti-aliasing line segment in GPU

Abstract

The invention discloses a blocking rendering algorithm based generation technology of a sawtooth line segment in a GPU, which is carried out after finishing blocking of the line segment. The generation technology comprises the following steps of determining left and right (or up and down) intersection points of the line segment in a block according to the block where the line segment is located and a line segment generation direction; writing intersection point data in a memory; generating a coordinate which has the width of 1 after taking out the line segment from the memory; expanding the coordinate according to the width of the line segment; shearing according to a block boundary and the like. The realization mode can be matched with the blocking rendering algorithm to finish rapid generation of the sawtooth line segment.

Description

Generation of Anti-aliased Line Segments in GPU Based on Block Rendering technical field The invention mainly relates to the field of anti-aliasing of lines in graphics chip design, in particular to the realization of anti-aliasing of lines in GPU based on block rendering. Background technique In the raster display system, since the graphics signal is continuous, but in the rasterization process, the pixels represented are discrete, and when discrete pixels are used to represent continuous graphics, distortion will occur, which is also called aliasing. Research to eliminate or The technology to weaken the aliasing phenomenon is called anti-aliasing technology, and the anti-aliasing of line segments has always been an important content in the design of graphics chips. The traditional graphics drawing pipeline is a fixed pipeline (FixedPipeline) architecture, but this architecture has frequent access to memory, resulting in low efficiency of the graphics chip. In order to r...

AI Technical Summary

Problems solved by technology

The traditional graphics drawing pipeline is a fixed pipeline (FixedPipeline) architecture, but this architecture has frequent access to memory, resulting in low efficiency of the graphics chip. In order to reduce the number of memory accesses, a GPU implementation technology based on block rendering is proposed. This The technique is to divide the drawing area into several blocks of equal size, and then render in units of blocks. Then, during the drawing process of a certain block, the pixels in other blocks are not allowed to enter the rendering. When the anti-aliasing line segment is generated, a line segment It may span several blocks. In order to achieve block-by-block drawing of anti-aliasing line segments, it is necessary to calculate the drawing range of the line segment in the block to ensure that when a certain block is drawn, pixels in other blocks will not be generated.

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