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Chip packaging method

A chip packaging and chip technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of long lead wires from chip pins to printed circuit board pins, increasing the difficulty of system design, and reducing system reliability, etc. To achieve the effect of simple and non-crossing, convenient application and short leads

Active Publication Date: 2011-06-22
JIANGNAN INST OF COMPUTING TECH
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Problems solved by technology

[0005] However, when the user applies the chip to the system according to the actual application and the allocation of the chip pins, for example, when the chip is connected to the printed circuit board (PCB) board, there will be a gap between the printed circuit board pins and the chip pins. The location of the chip does not match, and the lead between the chip pin and the printed circuit board pin is long or crossed, which increases the difficulty of system design when the chip is used, and the reliability of the system will be reduced due to the crossing of the lead.

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Embodiment Construction

[0034] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0035] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the...

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Abstract

The invention provides a chip packaging method, which comprises the following steps of: providing a chip kernel, determining the position of a chip kernel pad, and determining the positions of pins of a printed circuit board applied to the chip kernel; determining the positions of chip pins according to the position of the chip kernel pad and the positions of the pins of the printed circuit board; and packaging a chip according to the positions of the pins of the chip. The chip packaging method reduces difficulties in system designing in the use of the chip.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a chip packaging method. Background technique [0002] At present, according to different capacity and layout design rules, chips of the same type designed by different integrated circuit design manufacturers have different numbers and arrangements of pads, and different pad arrangements correspond to different packaging forms. For example, the common packages currently applicable to SRAM memories include TSQP (Thin Small Outline Package) I 48LD, TSQP YY 44LD, TQFP (Tini Quad Flat Package) 100, and BGA (Ball Matrix Package). [0003] As mentioned in the Chinese patent application document with application number 200514129753.3. According to the number and position of the pads of the chip core, as well as the design and process requirements, select the appropriate package form. The pin position of the lead frame (lead-frame) of each package form corresponds to...

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Application Information

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IPC IPC(8): H01L21/50H01L21/60
Inventor 黄永勤高剑刚金利峰王彦辉胡晋王玲秋李亮
Owner JIANGNAN INST OF COMPUTING TECH