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Method for hierarchically executing configuration streams in dynamically reconfigurable processor

A processor and layered technology, applied in the direction of machine execution devices, electrical digital data processing, instruments, etc., can solve the problems of large amount of configuration flow information, transmission speed cannot meet application requirements, etc., and achieve the effect of reducing space

Active Publication Date: 2013-07-17
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Based on the large amount of information in the configuration flow in the dynamic reconfigurable processor, the transmission speed often cannot meet the application requirements. At present, a technical problem that needs to be solved urgently by those skilled in the art is: how to innovatively propose an effective measure to Solve the problems existing in the existing technology, speed up the transmission speed of configuration information, improve configuration efficiency, and reduce the storage space of configuration information in the processor

Method used

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  • Method for hierarchically executing configuration streams in dynamically reconfigurable processor
  • Method for hierarchically executing configuration streams in dynamically reconfigurable processor
  • Method for hierarchically executing configuration streams in dynamically reconfigurable processor

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Embodiment

[0086] refer to Figure 6 , shows a flow chart of a method for hierarchical execution configuration flow in a dynamically reconfigurable processor of the present invention, the method includes:

[0087] Step S601, obtaining the configuration information level 0, and performing the transfer and operation of configuration information of the external data read-in device and write-out device;

[0088] Step S602, the address of the subunit configuration information queue and the corresponding synchronization information are transferred to the subtask buffer, and the subunit configuration information queue memory is read and accessed according to the address of the subunit configuration information queue corresponding to each subtask, and the index corresponds to The configuration information level 1 of the sub-task is passed to the synchronization controller between sub-units to control the synchronization between sub-units;

[0089] Step S603, after completing the corresponding o...

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Abstract

The invention provides a method for hierarchically executing configuration streams in a dynamically reconfigurable processor. Hierarchical configuration information is in one-to-one correspondence with the hierarchical partition of an application algorithm so as to ensure that the entire application algorithm is correctly mapped on the dynamically reconfigurable processor. The hierarchical configuration information can be used for compressing the information content of the configuration information so as to reduce the storage space of the configuration information in the processor.

Description

technical field [0001] The invention relates to the technical field of dynamic reconfigurable processors in the field of embedded systems, in particular to a method for hierarchically executing configuration flows in a dynamically reconfigurable processor. Background technique [0002] Dynamic reconfigurable processor is a new processor architecture, which has significant advantages over previous single-core processors, dedicated chips, and field programmable logic arrays, and is a direction for the development of future circuit structures. [0003] First of all, a dynamically reconfigurable processor often contains multiple arithmetic logic units, and the number is huge, which is called a many-core array. The array is equipped with a highly flexible routing unit to realize the diverse interconnection between the arithmetic and logic units. Therefore, the many-core array connected by the routing unit can realize high-speed processing of data streams, and has a huge advantag...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/30G06F9/34
Inventor 刘雷波王延升朱敏戚斌杨军曹鹏时龙兴尹首一魏少军
Owner TSINGHUA UNIV