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Electrostatic discharge (esd) protection circuit

A technology for electrostatic discharge protection and protection circuits, which is applied to emergency protection circuit devices, emergency protection circuit devices and circuits for limiting overcurrent/overvoltage, and can solve problems such as device damage

Active Publication Date: 2014-11-05
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The simple contact of a finger with the leads or fittings of an ESDS device allows a body discharge that could result in damage to the device

Method used

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  • Electrostatic discharge (esd) protection circuit
  • Electrostatic discharge (esd) protection circuit
  • Electrostatic discharge (esd) protection circuit

Examples

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Embodiment Construction

[0046] Traditionally, ground gate n-type metal oxide semiconductor devices (GGNMOS) and resistor-capacitor (RC) triggered field effect transistors (FETs) have been used as ESD protection devices for high voltage (HV) power integrated circuits (ICs). However, CGNMOS devices and RC trigger FETs not only consume a large area of ​​the chip, but also have the disadvantage of only providing limited current density.

[0047] It can be appreciated that the following disclosure provides many different embodiments, or examples, for implementing the various disclosed features. The elements and arrangements of certain examples are described below to simplify the present disclosure. Of course, this is only an example and not a limitation. Additionally, the present disclosure may repeat reference numerals and / or letters in various instances. Repetition is for simplicity and clarity and does not illustrate the relationship and / or configuration of the various embodiments. In addition, the ...

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PUM

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Abstract

An electrostatic discharge (ESD) protection circuit includes at least one bipolar transistor. At least one isolation structure is disposed in a substrate. The at least one isolation structure is configured to electrically isolate two terminals of the at least one bipolar transistor. At least one diode is electrically coupled with the at least one bipolar transistor, wherein a junction interface of the at least one diode is disposed adjacent the at least one isolation structure.

Description

technical field [0001] The invention relates to a semiconductor circuit, in particular to an electrostatic discharge (ESD) protection circuit. Background technique [0002] There are two types of damage to be prevented in integrated circuit (IC) products: high ESD currents due to ESD events, and high voltage surges due to inductive loads. ESD protection mechanisms generally operate in two ways. Structural damage to integrated circuits is prevented by dissipating ESD current transients using low-impedance discharge channels. Ideally, a complete ESD protection solution would be to create an effective discharge path at each pin of the IC. [0003] Devices used as ESD protection components include diodes, bipolar transistors, metal oxide semiconductor field effect transistors (MOSFETs), and silicon controlled rectifiers (SCRs). SCRs function as switches that conduct and shunt voltage from input / output (I / O) pads of integrated circuits to ground. [0004] During ESD protectio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/60H01L27/02H02H9/00H02H9/04
CPCH01L2924/0002H01L2224/16225H01L27/0259H01L2924/1301H01L2924/13034H01L2924/1305H01L2924/13091H01L2924/00H01L2924/00014
Inventor 任丽平段孝勤何大椿
Owner TAIWAN SEMICON MFG CO LTD