Shallow trench isolation (STI) structure chemical mechanical polishing (CMP) method and STI structure manufacture method

Abstract

The invention discloses an STI-CMP method for a silicon oxide / silicon nitride double inner wall protective layer and a method for manufacturing an STI structure by using the method, using a method with a higher grinding rate ratio of silicon oxide to silicon nitride Grinding and removing the silicon dioxide filling layer of the groove and stopping on the silicon nitride protective layer, and then polishing the silicon nitride protective layer with a polishing slurry with a higher silicon nitride to silicon oxide grinding rate ratio, and completely removing After the silicon nitride protective layer is formed, the silicon dioxide protective layer is polished with the original polishing fluid having a relatively high polishing rate ratio of silicon oxide to silicon nitride, and finally stays on the silicon nitride barrier layer. Therefore, the additional wet etching step of removing the silicon nitride protective layer and the silicon dioxide protective layer in the traditional STI manufacturing method is avoided, the process complexity is reduced, and the flatness of the wafer surface is improved.

Description

technical field [0001] The present invention relates to a manufacturing process of electronic components, in particular to a chemical mechanical polishing method for a shallow trench isolation structure of a silicon oxide / silicon nitride double inner wall protective layer, and using the method to manufacture the shallow trench isolation structure Methods. Background technique [0002] In a semiconductor manufacturing process, shallow trench isolation (Shallow Trench Isolation, or STI) technology is widely used as a device isolation technology. As shown in Figure 1, the common STI process flow is: first deposit a layer of silicon oxide (pad oxide) and silicon nitride (pad nitride) on a silicon substrate (substrate) 1 in sequence, where the silicon oxide layer is used as the silicon lining The bottom protective layer, silicon nitride as a barrier layer for subsequent etching and chemical mechanical polishing processes ( Figure 1a ). Then through photolithography and etching...

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Problems solved by technology

[0005] For this three-layer film structure, the usual STI-CMP polishing will stop on the silicon nitride (liner nitride) protective layer at the end, thus requiring additional wet The silicon nitride protective layer, the silicon oxide protective layer, and the silicon nitride barrier layer and the silicon oxide barrier layer are removed in sequence, which increases the complexity of the process and is not conducive to the flatness of the wafer surface.

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