Method for reducing semiconductor device hot carrier injection damage

Abstract

The invention provides a method for reducing the semiconductor device hot carrier injection damage. In a spacer etching process, an inclined angle introduction plasma etching method is adopted, so the spacer width of the drain end after the etching is increased, the spacer width of the source end is decreased, after the subsequent source and drain high doping injection and annealing process, the distance from doped ions of the drain end to a channel is enlarged, the distance from doped ions of the source end to the channel and a substrate is reduced, under the condition of keeping the effective channel length unchanged, and the longitudinal electric field intensity of the drain end is reduced, so the semiconductor device hot carrier injection damage is reduced.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor device, in particular to a method for reducing hot carrier injection damage of a semiconductor device, and a semiconductor device manufactured by using the method. Background technique [0002] With the improvement of the integration of miniaturized systems, the size of metal oxide semiconductor (MOS) devices has been reduced sharply. The high integration of devices and ultra-thin gate oxide layers enable devices to provide better performance, but due to the device channel The shortening of the gate oxide layer and the thinning of the gate oxide layer will bring a series of reliability problems to the manufactured MOS devices. [0003] The hot carrier effect is an important failure mechanism of MOS devices. With the shrinking of the size of MOS devices, the hot carrier injection effect of the devices becomes more and more serious. Taking a PMOS device as an example, the holes in the ch...

AI Technical Summary

Problems solved by technology

[0006] For the semiconductor device manufactured by the above method, the sidewall thickness of the drain end and the source end around the gate is the same, and the distance between the drain end and the source end doped region is the same from the device channel. Therefore, when the performance of the source end is still intact, the drain end more prone to failure

Images