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Method for enhancing read-in speed of floating body effect storage unit and semiconductor device

A storage unit and writing speed technology, applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve problems such as leakage and need to be improved, reduce leakage speed, improve writing speed, and increase substrate current Effect

Active Publication Date: 2013-11-13
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] When the floating body effect memory cell is writing "1", the carriers will accumulate in the substrate while slowly leaking from the source. The inventor believes that the writing speed of the floating body effect memory cell ("1") has yet to be reached improve

Method used

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  • Method for enhancing read-in speed of floating body effect storage unit and semiconductor device
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  • Method for enhancing read-in speed of floating body effect storage unit and semiconductor device

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Embodiment Construction

[0019] In the usual process, the sidewall formation (deposition and etching) process of the floating body effect memory cell is as follows: Figure 2A-2C shown.

[0020] First, the sidewall material is deposited, and the cross-section of the device after deposition is as follows Figure 2A shown. The floating body effect memory unit in the figure comprises bottom silicon 10, and described bottom silicon 10 is silicon-on-insulator for example; Formed on bottom silicon 10 Buried oxide layer 20; Formed on the substrate 30 of buried oxide layer 20, described The substrate 30 can be a silicon substrate, of course, in some occasions, a germanium substrate, a silicon germanium substrate or other semiconductor materials can also be applied; the shallow trench isolation groove 31 (shallow trench isolation, That is, STI), used to isolate each floating body effect memory cell; a gate oxide layer 41 and a gate 42 formed sequentially on the substrate 30, and a channel in the substrate 30...

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Abstract

The invention provides a manufacturing method for enhancing read-in speed of a floating body effect storage unit and an intermediate transitional semiconductor device, which belong to the technical field of semiconductor manufacture. The core of the invention is that: a side wall material is deposited, and inclination plasma surface processing is conducted on the side wall material, so that the surface characteristics of the top of the side wall material and the side part close to a source electrode of the side wall material are changed, and the side part close to a drain electrode of the side wall material is not changed; the side wall material is etched to form a side wall, and the width of the side wall close to the source electrode is larger than that of the side wall close to the drain electrode; and the side wall is taken as a mask, heavy doping and annealing process are conducted to form the source electrode and the drain electrode, the distance between doped ion of the drain electrode and a channel is reduced, and the distance between doped ion of the source electrode and a liner is increased. In the invention, a longitudinal electric field in the channel of the drain electrode is improved on one hand, and the current of the liner is increased, and on the other hand, the leaking speed of accumulated current carriers is reduced from the source electrode, so that the read-in speed of the floating body effect storage unit is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method capable of increasing the writing speed of a floating body effect memory unit and an intermediate transition semiconductor device. Background technique [0002] The development of embedded dynamic storage technology has made large-capacity dynamic random access memory (Dynamic Random Access Memory, DRAM) very common in current System on a Chip (SoC). Large-capacity embedded DRAM brings SoC benefits such as improved bandwidth and reduced power consumption that can only be achieved by using embedded technology. In addition to transistors, each storage unit of traditional embedded dynamic random access memory (embbeded Dynamic Random Access Memory, eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the storage unit larger than its width. Much larger, causing manufacturing process diffi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8242H01L27/108H10B12/00
Inventor 俞柳江周军
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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