SPICE (Simulation Program with Integrated Circuit Emphasis) testing structure of MOS (Metal Oxide Semiconductor) device

Abstract

The invention discloses a SPICE (Simulation Program with Integrated Circuit Emphasis) testing structure of an MOS (Metal Oxide Semiconductor) device, comprising a plurality of MOS devices which are sequentially arranged and a plurality of pins, substrates of all the MOS devices are connected, grid electrodes of the MOS devices with odd numbers in an arrangement position are connected, grid electrodes of MOS devices with an even number in the arrangement position are connected, a source electrode or a drain electrode of a front MOS device is shared with a drain electrode or a source electrode of a back MOS device which is adjacent to the front MOS device to form a plurality of shared pins; the grid electrodes of MOS devices with the odd numbers in the arrangement position, the grid electrodes of MOS devices with the even numbers in the arrangement position, the plurality of shared pins, the drain electrode or the source electrode of the MOS device which is in the first position of the arrangement position, the source electrode or the drain electrode of the MOS device which is in the last position of the arrangement position are respectively connected with one pin, therefore, more MOS devices can be arranged in a limited area, the mutual influence of the adjacent MOS devices is avoided when a current leakage test is performed, and the testing precision of the current leakage is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a SPICE test structure of a MOS device. Background technique [0002] In semiconductor integrated circuits, circuit system designers sometimes need to do a detailed analysis of the relationship between voltage and current for some circuits in the system. At this time, transistor-level simulation is required. The circuit models used in the transistor-level simulation are the most basic components and single transistors, and this simulation is usually implemented through a simulation program with integrated circuit enhancement (SPICE, Simulation Program With Integrated Circuit Emphasis). [0003] In order to carry out SPICE simulation, the SPICE model of components must be established first, such as the SPICE model of MOS devices, so that there are specific mathematical models in the simulation program to describe the corresponding components. For MOS devices, all th...

AI Technical Summary

Problems solved by technology

But only 9 MOS devices can be placed on each dicing lane with 25 pins, wasting area

Images