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Method for forming contact hole

A contact hole and patterning technology, which is applied in the manufacture of electrical components, semiconductor/solid-state devices, circuits, etc., can solve problems such as gate damage, improve performance, reduce over-cutting and damage, and reduce over-cutting and damage Effect

Active Publication Date: 2014-06-04
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The problem solved by the invention is the problem of damage to the gate during the formation of the contact hole, so as to improve the performance of the device

Method used

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  • Method for forming contact hole
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  • Method for forming contact hole

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Experimental program
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Embodiment Construction

[0031] In the process of forming contact holes in the prior art, since the thickness of the dielectric layer above the gate is smaller than the thickness of the dielectric layer above the source and drain, the barrier layer above the gate is over-etched. The material of the barrier layer in the technology is generally silicon nitride, and the material of the dielectric layer is generally silicon oxide, and its etching selection ratio is about 5, so that the barrier layer above the gate is over-etched and the thickness is significantly smaller. In the process of removing the barrier layer by etching, the gate is over-etched and damaged, which increases the contact resistance between the gate and the plug, and affects the performance of the device.

[0032] In this technical solution, a first barrier layer and a dielectric layer are sequentially formed on the semiconductor substrate to cover the MOS transistor and the semiconductor substrate, and the etching selection ratio of the f...

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Abstract

The invention discloses a method for forming a contact hole. The method comprises the following steps of: providing a semiconductor substrate, forming a metal oxide semiconductor (MOS) transistor on the semiconductor substrate, forming a first barrier layer and a dielectric layer sequentially, and covering the MOS transistor and the semiconductor substrate, wherein the etching selection ratio of the first barrier layer to the dielectric layer is more than or equal to 10; etching the dielectric layer, forming a first opening, a second opening and a third opening above a gate, a source and a drain of the MOS transistor respectively, wherein the first barrier layer is exposed out of the bottoms of the first opening, the second opening and the third opening; and removing the first barrier layer at the bottoms of the first opening, the second opening and the third opening. According to the method, the gate can be prevented from being damaged in the process of contact hole forming, and the performance of a device can be improved.

Description

Technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to a method for forming contact holes. Background technique [0002] In the semiconductor manufacturing process, after the MOS transistor is formed on the semiconductor substrate, a dielectric layer is formed on it to cover the MOS transistor, and the dielectric layer above the gate, source and drain of the MOS transistor is etched and other processes An opening is formed to expose the gate, source and drain, and the opening is called a contact hole (Contact). In a subsequent process, the contact hole is filled with metal, such as tungsten, to form a plug (Plug) to realize the interconnection between the MOS transistor and the upper interconnection structure. [0003] Figure 1 to Figure 3 A cross-sectional view of an intermediate structure corresponding to a method for forming a contact hole in the prior art is shown. [0004] reference figure 1 , Provide a semiconductor substrate...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/311
Inventor 黄敬勇韩秋华
Owner SEMICON MFG INT (SHANGHAI) CORP