Method for measuring warpage of electronic packaging product

Abstract

The invention provides a method for measuring the warpage of an electronic packaging product. The method comprises the following steps of: (1) sensor chip calibration: installing a silicon stress sensor chip on a surface of a calebration sample; using a pressing block to enable a product to be measured to be warped and deformed so that an output voltage is generated because of warpage and deformation of the silicon stress sensor chip; and calibrating the relationship of the output voltage of the silicon stress sensor chip and the warpage degree of the calebration sample according to a measurement result; (2) measurement of warpage of the electronic packaging product: installing the silicon stress sensor chip on the surface or inside the electronic packaging product to be measured; warping and deforming the sensor chip to form an output voltage; and obtaining the warpage degree of the electronic packaging product to be measured according to the calibrated relationship and the measurement result. According to the method disclosed by the technical scheme of the invention, the warpage condition in the process of packaging or in the packaging system can be monitored, thus packaging process parameters are regulated and perfected according to the measurement result.

Description

technical field [0001] The present invention relates to electronic packaging, in particular to a method for measuring the degree of warpage of electronic packaging products. Background technique [0002] In the electronic packaging system, the warpage of the silicon wafer and the printed circuit board will have a great impact on the performance of the packaging system. Using a specific method to measure the warpage of this type of system can provide useful help for improving the design and process of the packaging system. [0003] At present, the warpage of silicon wafers mainly adopts the "Non-contact Test Method for Warpage of Silicon Wafers" (national standard GB / T6620-200×), the silicon wafers are placed on the 3 fulcrums of the reference ring, and the 3 fulcrums form a benchmark flat. A pair of probes of the tester scans synchronously on the upper and lower surfaces of the silicon wafer along a prescribed path. During the scanning process, the distance between the up...

AI Technical Summary

Problems solved by technology

However, this method also has application problems: first, the warpage measurement of silicon wafers needs to use a complete wafer, and it is impossible to measure the warpage of the packaged system; Cleanliness requirements are very high, and any small contamination on the silicon wafer will affect the final measurement results

In addition, this measurement method has strict requirements on ambient temperature and humidity, and it is inconvenient to use; moreover, the current cost of such instruments is still relatively high

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