Demodulator circuit for carrier signal of power line and microcontroller
A power line carrier and signal demodulation technology, applied in frequency modulation carrier system, phase modulation carrier system, distribution line transmission system, etc., can solve the problem of high cost of microcontroller chips, and achieve the effect of expanding communication coverage and reducing costs
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Embodiment 1
[0027] figure 1 A schematic structural diagram of a power line carrier signal demodulation circuit provided in Embodiment 1 of the present invention, as shown in figure 1 As shown, the electronic line carrier signal demodulation circuit includes: a digital oscillation control module 11 , a first frequency mixing and filtering module 12 , a second frequency mixing and filtering module 13 , an FSK demodulation module 14 and a PSK demodulation module 15 .
[0028] Specifically, the digital oscillation control module 11 is used to generate a first local quadrature signal and a second local quadrature signal, and output the first local quadrature signal to the first frequency mixing and filtering module 12, and output the second local quadrature signal Output to the second frequency mixing and filtering module 13; the first frequency mixing and filtering module 12 is connected with the FSK demodulation module 14 and the PSK demodulation module 15, and is used to mix the carrier sig...
Embodiment 3
[0039] image 3 The circuit schematic diagram of the demodulation circuit provided for the third embodiment of the present invention, such as image 3 As shown, the power line carrier signal demodulation circuit includes: a first multiplier 201, a second multiplier 202, a third multiplier 203, a fourth multiplier 204, a fifth multiplier 205, a first LPF 206, a second LPF 207, NCO 208, loop filter 209, first delay unit (Z -1 ) 210, the second delay unit (Z -1 ) 211 and subtractor 212.
[0040] The working process of the power line carrier signal demodulation circuit when performing PSK demodulation on the carrier signal is as follows: the carrier signal is divided into two paths, I and Q, namely the carrier signal I and the carrier signal Q, wherein the carrier signal I passes through the first multiplier 201. Multiply the cosine signal generated by the NCO 208 (that is, the first local quadrature signal described in the embodiment of the present invention) to obtain the fir...
Embodiment 4
[0043] Figure 4 A schematic structural diagram of the microcontroller provided in Embodiment 4 of the present invention, such as Figure 4 As shown, the microcontroller includes a central processing module 31, and also includes: a power line carrier signal demodulation circuit 32, and the power line carrier signal demodulation circuit 32 specifically includes: a digital oscillation control module 321, a first mixing and filtering module 322, a second Two mixing and filtering module 323 , FSK demodulation module 324 and PSK demodulation module 325 .
[0044]Specifically, the central processing module 31 is specifically a CPU; the digital oscillation control module 321 is used to generate the first local quadrature signal and the second local quadrature signal, and output the first local quadrature signal to the first mixing and filtering module 322 , output the second local quadrature signal to the second frequency mixing and filtering module 323; the first frequency mixing a...
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