Digital signal processor (DSP) hardware implementation method of Luby transform (LT) encoding and decoding algorithm

A hardware implementation, encoding and decoding technology, applied in the field of DSP hardware implementation of LT encoding and decoding algorithms, can solve problems such as limited processing capacity and memory space, and achieve the effect of improving random selection, reducing memory space, and improving decoding efficiency.

Inactive Publication Date: 2012-07-18
HENAN UNIV OF SCI & TECH
View PDF3 Cites 11 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the limited processing power and memory space of the DSP chip, two problems must be solved when using DSP technology to realize the LT codec: 1) how to design the encoding and decoding algo

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Digital signal processor (DSP) hardware implementation method of Luby transform (LT) encoding and decoding algorithm
  • Digital signal processor (DSP) hardware implementation method of Luby transform (LT) encoding and decoding algorithm
  • Digital signal processor (DSP) hardware implementation method of Luby transform (LT) encoding and decoding algorithm

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0021] Specific implementation method

[0022] The DSP hardware implementation method of an LT encoding and decoding algorithm of the present invention will be described below with reference to the accompanying drawings.

[0023] A DSP hardware implementation method of LT encoding and decoding algorithm, including asynchronous serial communication transceiver, TMS320VC5416 chip, FIASH chip, power regulator chip, LT encoder and decoder, and asynchronous serial communication transceiver to realize asynchronous data For transmission, use the power regulator chip to supply power to the TMS320VC5416 chip, and use the FIASH chip to save the coded program segment. The LT decoder decodes after receiving the encoded signal from the asynchronous serial communication transceiver. During the decoding process, the LT decoder passes The communication channel sends feedback information to the LT encoder to control the work of the LT encoder.

[0024] Such as figure 1 As shown, in the encoder, th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

A digital signal processor (DSP) hardware implementation method of Luby transform (LT) encoding and decoding algorithm comprises an asynchronous serial communication transceiver, a transmission measuring set (TMS) 320 VC 5416 chip, a FIASH chip, a power supply regulator chip and a LT encoder and decoder. The method includes that the asynchronous serial communication transceiver is utilized for achieving asynchronous data transmission, the power supply regulator chip is used for supplying power for the TMS 320 VC5416 chip, the FIASH chip is used for preserving encoding and decoding program segments, the LT decoder decodes encoding signals after receiving the encoding signals from the asynchronous serial communication transceiver, and the LT decoder sends feedback information to the LT encoder through communication channels in the decoding process; so that the work of the LT encoder is controlled, and the LT encoding and decoding algorithm is conveniently achieved, besides, the DSP hardware implementation method of the LT encoding and decoding algorithm improves the efficiency of algorithm, and fully reduces the memory use amount on the DSP chip.

Description

technical field [0001] This application relates to a method for realizing LT encoding and decoding algorithms based on DSP technology, which can be widely used in technical fields such as wired digital communication, digital storage, and multi-source downloading. Background technique [0002] With the rapid development of information technology, the traditional TCP / IP protocol is not suitable for the real-time transmission of large-capacity information in the Internet due to the large data transmission delay. Therefore, researchers have proposed erasure coding technology. That is, the sender sends the data that needs to be transmitted K Source information packets are encoded and integrated into N An encoded packet is sent over the network. The receiver receives this N Any of the encoded packets K A coded packet can be reconstructed with high probability using a specific decoding method K source packets. [0003] In 1998, Bayers et al. proposed a new type of erasure cod...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H04L1/00
Inventor 师歌高宏峰邵鸿翔胡俊宏谢泽峰师春灵
Owner HENAN UNIV OF SCI & TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap