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Water floating point multiply-accumulate method based on FPGA

A floating-point multiplier and floating-point multiplication technology, which is applied to calculations using number system representation, calculations using non-contact manufacturing equipment, concurrent instruction execution, etc., can solve problems such as designing and optimizing multiplication accumulators, and achieve versatility Good, improved running speed, and strong portability

Inactive Publication Date: 2012-08-08
HUNAN UNIV
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Problems solved by technology

In recent years, many scholars have studied floating-point multiply-accumulate algorithms based on the characteristics of FPGAs, but they are all optimized and improved based on relatively mature and complex algorithms at present. Although this kind of thinking can be slightly optimized and improved the performance of the entire algorithm on FPGAs , but no practitioners make full use of intellectual property cores (Intellectual Property, IP) to design optimized multiply-accumulators

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  • Water floating point multiply-accumulate method based on FPGA
  • Water floating point multiply-accumulate method based on FPGA
  • Water floating point multiply-accumulate method based on FPGA

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Embodiment Construction

[0031] The present invention will be further described in detail below with reference to the drawings and specific embodiments of the specification.

[0032] Such as figure 1 As shown, the FPGA-based floating-point multiply-accumulator method of the present invention has the following flow:

[0033] (1) Input the number M that needs to be multiplied and accumulated through the external module; the whole calculation process will drive the floating-point multiplier, floating-point adder and the enable signal of each calculation module according to the value of M;

[0034] (2) According to the calculation rules of the multiply accumulator and the pipeline characteristics of the floating-point multiplier and the adder IP core, the M that needs to be calculated is input into the floating-point multiplier for the multiplication of the 32-bit binary floating-point numbers A and B at the same time. A set of inputs for A and B until all M operations on data are completed; at the same time, th...

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Abstract

The invention discloses a water floating point multiply-accumulate method based on FPGA. The method comprises the following steps: firstly inputting a number M to undergo multiply-accumulate calculation, secondly, sequentially inputting M 32-bit binary floating point numbers A and B which are required to be calculated into floating-point multiplier to undergo multiplication till the operation of M data is accomplished, and simultaneously and continuously inputting the product result of the floating-point multiplier and the addition result of a first floating-point adder to the first floating-point adder to accomplish a part of summation operation to obtain a summation result, and thirdly, inputting data of the last N stage pipeline in the summation result obtained in step two into a second floating-point adder to be calculated to obtain the result of the whole multiply-accumulate process. The method has the advantages that the principle is simple, the universality is good, the operating speed can be improved, and the like.

Description

Technical field [0001] The present invention mainly relates to the design field of embedded systems, and specifically refers to a pipelined floating point multiplication and accumulation method based on FPGA. Background technique [0002] There are two main types of computer operations: fixed-point operations and floating-point operations. Among them, fixed-point operations are mainly used for arithmetic operations, logical operations, address calculations, etc., such as operations on fixed-point integers and decimals, and operations on logical data. Compared with fixed-point operations, floating-point operations have faster operations and higher effective accuracy. , Wide counting range, etc., so it is more suitable for use in engineering calculations and scientific calculations, it has become an important way of computer operations. [0003] Currently, most floating-point arithmetic uses DSP chips to realize arithmetic functions, which can simplify the algorithm and increase the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/52G06F9/38
Inventor 徐成秦云川张婷肖雄仁戚芳芳周圣韬文龙李涛张良聂敏
Owner HUNAN UNIV
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