Semiconductor structure and preparation method of semiconductor structure

Abstract

The invention relates to a semiconductor structure and a preparation method of the of semiconductor structure. The semiconductor structure comprises an NMOS (N-channel metal oxide semiconductor) device with a first gate structure, a PMOS (P-channel Metal Oxide Semiconductor) device with a second gate structure, first stress linings and a second stress lining, wherein the first stress linings are at least formed at the two sides of the first gate structure of the NMOS device, and the second stress linings are at least formed at the two sides of the second gate structure of the PMOS device, wherein each first stress lining is a spin-on glass (SOG) film with tensile stress, and each second stress lining is made of a material capable of guiding pressure stress into a trench of the PMOS device. According to the semiconductor structure and the preparation method, the processing difficulty of preparing a double-stress lining by using the same material such as a nitride can be reduced under the condition that the tensile stress advantage is maintained; moreover, the influence of a nitride with high dielectric constant on delay of device interconnection can be lowered.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly relates to a semiconductor structure and a manufacturing method thereof. Background technique [0002] Theoretical and empirical studies have confirmed that when stress is applied to the channel of a transistor, the semiconductor lattice in the channel region is strained, and the carrier mobility of the transistor can be increased or decreased; however, it is also known that the electron and space Caves respond differently to the same type of strain. For example, compressive stress is applied in the longitudinal direction of current flow to cause compressive strain in the channel region, which is beneficial to improve hole mobility, but correspondingly reduces electron mobility. Applying tensile stress in the longitudinal direction leads to tensile strain of the channel region lattice, which is beneficial to improve electron mobility, but correspondingly reduces hole m...

AI Technical Summary

Problems solved by technology

However, for the same kind of nitride material, it is necessary to generate compressive stress on the PMOS structure and tensile stress on the NMOS structure, which causes difficulties in the process; A nitride layer with the first stress (such as compressive stress) is formed on the structure and the NMOS structure, and then one of the PMOS structure and the NMOS structure is masked to protect it, and then the nitride layer on the other structure is etched etch, which makes selective etching of the same material difficult; in addition, nitrides with high dielectric constants have a detrimental effect on the interconnection delay of the device

Images