Method, device and system for carrying out data reading and writing on basis of DDR SDRAN (Double Data Rate Synchronous Dynamic Random Access Memory)

Abstract

The invention discloses a method, device and system for carrying out data reading and writing on the basis of a DDR SDRAN (Double Data Rate Synchronous Dynamic Random Access Memory), which are used for solving the problems that the efficiency is low and the cache utilization rate is poorly increased during reading-writing based on the DDR. The method comprises the steps of: according to the size of a chain table node, dividing a received message into a plurality of data blocks with corresponding lengths; aiming at each data block, dividing the data block into a plurality of data sub units, when the quantity of bytes included by the last data sub unit in the data block is not more than the length of a byte processed by one DDR every time; and splicing data of corresponding bytes in the last data sub unit and the first data sub unit in the next data block, and writing into the group of DDR SDRAM. Because when reading-writing operations are carried out through each group of DDR in the embodiment of the invention, in order to avoid the waste of DDR resources, the data is spliced, therefore, the efficiency of DDR reading-writing is increased, and the utilization rate of cache efficiency is increased.

Description

technical field [0001] The present invention relates to the technical field of data communication, in particular to a method, device and system for reading and writing data based on Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM). Background technique [0002] With the continuous growth of network capacity and business, in order to realize the quality of service (Quality of Service, QoS) service requirements of packets and high priority priority services, it is necessary for the traffic management chip in the network device to have a large enough cache space to store The message sent by the upstream device is cached and then scheduled for output, so as to realize the scheduling of different data according to the priority. [0003] For high-end network equipment, the basic requirement is to cache at least 200ms of wire-speed packet data. In a 40Gbps environment, the network equipment needs at least 8Gbits of cache capacity. In order to ensure the cache c...

AI Technical Summary

Problems solved by technology

[0007] In view of this, the embodiment of the present invention provides a method, device and system for data read and write operations based on DDR SDRAM, to solve the problem of existing DDR-based read and write operations. The efficiency of writing is not high, which is not conducive to improving the cache utilization

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