Flip chip molding structure and method of non-array bump

Abstract

The invention relates to a flip chip molding structure and a flip chip molding method of a non-array bump. The flip chip molding structure of the non-array bump comprises a substrate, a chip and an epoxy molding compound, wherein the substrate is provided with an upper surface which is covered by an anti-welding layer, a plurality of connection cushions exposed out of the anti-welding layer and at least one mold flow conducting bar are arranged on the upper surface, and the mold flow conducting bar is arranged in a connection cushion-free blank area among the connection cushions, is higher than the connection cushions and the anti-welding layer and is protruded; the chip is provided with a plurality of bumps which are arranged in a non-array mode and are jointed onto the substrate in a flip chip mode, and a mold flow clearance is formed between the chip and the substrate; and the epoxy molding compound is formed on the upper surface of the substrate to seal a chip and is filled in the mold flow clearance. In the molding process, the mold flow conducting bar can guide mold flow and balance flow velocity, so that air bubbles or air holes are not generated in the mold flow clearance; and the flip chip molding structure and the flip chip molding method are particularly suitable for packaging a large number of metal post solder-chip connection frameworks in a molding manner.

Description

technical field [0001] The invention belongs to the packaging structure and technical field of semiconductor devices, in particular to a flip-chip mold sealing structure and method of non-group bumps. Background technique [0002] In the current semiconductor industry, Flip Chip Package Technology (Flip Chip Package Technology) is widely used in the field of chip packaging because of its many advantages such as reducing the packaging area and shortening the signal transmission path. In order to fully combine the chip with the substrate, an underfill is usually used to fill the gap between the chip and the substrate in the early days to overcome the stress caused by the difference in thermal expansion coefficient between the chip and the substrate. The interface between the chip and the substrate protects it from environmental influences such as moisture. [0003] The traditional underfill is dispensing on the side of the chip and uses capillary effect as the driving force t...

AI Technical Summary

Problems solved by technology

This process has the following disadvantages: (1) Filling is slow. Driven by capillary action, the filling time is approximately proportional to the square of the distance, and the filling time is about a few minutes to ten minutes depending on the temperature of the underfill. ; (2) A set of primer filling equipment can only dispense glue on a single chip at a time. If two (including) chips are to be dispensed at the same time, it is necessary to prepare multiple sets of glue dispensing equipment, which will increase the burden of cost

Such a semiconductor packaging product with air holes or air bubbles will weaken the mechanical strength of the product

Moreover, when there are air bubbles or air holes in the molding compound, it is easy to cause thermal expansion between the chip and the substrate during the thermal cycle process and burst, resulting in problems such as quality reliability (reliability)

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