Programming method of fpga configuration program

Abstract

The invention provides a burning method of an FPGA (Field Programmable Gate Array) configuration program, and aims to provide a burning method which has the advantages of quick starting, good maintainability, convenience in burning of the configuration program and capability of supporting various burning means and is not limited by FPGA environment conditions. The burning method is realized through the technical scheme consisting of the following steps of: reading a configuration program file which is positioned in a configurator by configuration software which operates in the configurator; constituting a burning request pack from read data according to pack length, a data pack serial number, FPGA configuration data, check and a pack format; writing, by a microprocessor, the data in the burning request pack into an address space of a configuration chip in sequence; comparing, by the microprocessor, the configuration data which is read out and written in by the configuration program and written in the configuration chip to finish the check of the burning request pack; and after check, transmitting a burning success acknowledgement pack by the microprocessor.

Description

technical field [0001] The invention relates to a programming method of a programmable logic array (FPGA) configuration program. Background technique [0002] The functions of various combinatorial logics in commonly used FPGAs are usually implemented through look-up tables. The physical structure of the FPGA lookup table is a static memory (SRAM). The contents of the SRAM determine the function of the look-up table. Due to the volatility of SRAM, the data will be lost after power off, and the configuration program needs to be loaded from the outside before each work. Generally, the loading configuration program is divided into active type and passive type. The active type FPGA reads the configuration program from the external configuration chip into the SRAM of the lookup table; the passive type controls the loading process by the external CPU, and the CPU writes the configuration program into the SRAM of the FPGA. [0003] There are two typical existing configuration pr...

AI Technical Summary

Problems solved by technology

[0006] 1. Before the program in the configurator and microprocessor is developed, the FPGA program cannot be programmed, so the debugging of the FPGA lags behind the debugging of other parts of the system;

[0007] 2. The FPGA starts slowly. After the power is turned on, the microprocessor must wait for the startup to start before loading the FPGA configuration program.

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