A non-volatile flip-flop array and working method
A non-volatile, working method technology, applied in instruments, static memory, read-only memory, etc., can solve the problems of large interrupt stack area, large static leakage power consumption, etc., to increase content and reduce static power consumption , the effect of reducing static leakage power consumption
Active Publication Date: 2015-10-28
SHANGHAI XINCHU INTEGRATED CIRCUIT
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Problems solved by technology
[0005] The present invention overcomes the defects of excessive static leakage power consumption and too large interrupt stack area in the prior art, and proposes a non-volatile flip-flop array
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[0041] The present invention will be further described in detail in conjunction with the following specific embodiments and accompanying drawings. The process, conditions, experimental methods, etc. for implementing the present invention, except for the content specifically mentioned below, are common knowledge and common knowledge in this field, and the present invention has no special limitation content.
[0042] like figure 2 As shown, the non-volatile flip-flop array of the present invention includes: a volatile flip-flop array 1 including a plurality of latch units 11 for latching flip-flop values when power is turned on. The nonvolatile phase-change memory array 2, which includes an array composed of phase-change memory cells 21, realizes saving the data in the latch unit 11; the control terminal group 3, which includes a plurality of control terminals 31, realizes control and adjustment of non-volatile The volatile phase change memory array 2 saves or restores the d...
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The invention discloses a non-volatile trigger array, which comprises a volatile trigger array, a non-volatile phase change memory array and a control end group, wherein the volatile trigger array comprises a plurality of latch units; the non-volatile phase change memory array comprises an array consisting of phase change memory units; the control end group comprises a plurality of control ends, and is used for realizing control and adjustment of the memorization of the non-volatile phase change memory array or recovery of data of the volatile trigger array; each column of phase change memory units in the non-volatile phase change memory array is connected with a latch unit in the volatile trigger array; and each row of phase change memory units in the non-volatile phase change memory array is connected with a control end in the control end group. The invention further discloses a working method for the non-volatile trigger array. Due to the adoption of the non-volatile trigger array and the working method, data can be memorized under a power-cutoff condition, the recovering speed of data is increased, and the chip area is reduced.
Description
technical field [0001] The invention relates to the field of chip-on-chip systems, in particular to a nonvolatile flip-flop array and a working method. Background technique [0002] In the prior art, in the SoC chip, a certain space is allocated in the data memory for interrupt stack processing. When multiple interrupts occur in the system, the system will save the current field PC pointer and the data in the internal data register area to the interrupt stack area in the on-chip data storage area in order according to the interrupt priority before processing the interrupt. After processing the current interrupt, the system restores the data in the interrupt stack area to the register group, so that the system returns to the scene before the interrupt. figure 1 Shown in is ARM's interrupt processing flow. When an interrupt signal occurs in the ARM system, the ARM processor saves a copy of the data in the CPSR register to the SPSR register, and then changes the mode and state...
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IPC IPC(8): G11C16/06G11C11/56
Inventor 景蔚亮陈邦明
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT