Semiconductor processing device and application method thereof
A technology for processing equipment and semiconductors, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of reducing the effect of processing, wafer scratches, wafer contamination, etc., to reduce the area of scratches, The effect of reducing the contact area and avoiding scratches
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Embodiment 1
[0053] Please refer to Figure 1(a) to Figure 1(c) , wherein, Fig. 1(a), Fig. 1(b) and Fig. 1(c) are respectively a schematic perspective view, a schematic top view and a schematic cross-sectional view along section line AA' of a wafer cover according to a preferred embodiment of the present invention.
[0054] As shown in the figure, the wafer cover 100 includes a bottom surface and a side wall connected to the bottom surface and surrounding the bottom surface, and a space between the side wall and the bottom surface forms a groove 101 . Wherein, the shape of the wafer cover 100 (that is, the shape of the bottom surface) is preferably circular, which is the same as the shape of the wafer, so that after the wafer cover 100 and the wafer are bonded together, the wafer can be completely covered. One surface of the circle only exposes the other surface, which is convenient for single-sided treatment of the exposed surface. In addition, the process of forming a circular wafer cov...
Embodiment 2
[0058] On the basis of referring to the description of the same part in the first embodiment, please refer to Figure 2(a) to Figure 2(c) , wherein, FIG. 2(a), FIG. 2(b) and FIG. 2(c) are respectively a schematic perspective view, a schematic top view and a schematic cross-sectional view along the section line AA' of a wafer cover according to another preferred embodiment of the present invention. The difference from the wafer cover shown in the first embodiment above is that, as shown in the figure, in this embodiment, the side wall and the bottom surface of the wafer cover 100 form two grooves, and the two grooves They are respectively located on both sides of the bottom surface. As shown in the figure, the two grooves are respectively a groove 102 and a groove 103 . The depth of the groove 102 (as shown in H in Fig. 2(c) 3 shown) and the depth of the groove 103 (as shown in Figure 2(c) H 4 shown) is preferably the same, and the depth ranges from 5 μm to (H 1 -200) / 2μm. ...
Embodiment 3
[0061] On the basis of referring to the description of the same part in the first embodiment, please refer to image 3 , image 3 It is a schematic cross-sectional view of a wafer cover according to another preferred embodiment of the present invention. The difference from the wafer cover shown in the first embodiment above is that, as image 3 As shown in the position circled by the dotted line, in this embodiment, the upper surface of the sidewall surrounding the groove 101 in the wafer cover 100 (that is, the area in contact with the wafer) is a rough structure (such as a suede structure) Wait). If the area where the wafer cover 100 is in contact with the wafer is smooth, and the surface of the wafer to be processed is usually smooth, then in the process of processing, due to the effect of high temperature (such as high temperature annealing), the wafer The area where the dome cover 100 is in contact with the wafer is prone to sticking, which makes it difficult to separa...
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