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Realization system and method of analog ps/2 interface based on embedded processor

An embedded processor and system implementation technology, applied in the input/output process of data processing, electrical digital data processing, instruments, etc., can solve the problems of reducing system performance, increasing chip cost, and increasing software complexity, etc., to reduce The effect of system operation loss, increased chip cost, and simplified software design

Active Publication Date: 2016-08-03
ANYKA (GUANGZHOU) MICROELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For the former, there will be a certain increase in the cost of the chip; for the latter, the complexity of the software will be increased, and the system performance will be reduced to a certain extent.

Method used

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  • Realization system and method of analog ps/2 interface based on embedded processor
  • Realization system and method of analog ps/2 interface based on embedded processor
  • Realization system and method of analog ps/2 interface based on embedded processor

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Embodiment Construction

[0021] The core idea of ​​the present invention is to propose a new way to realize the PS / 2 interface, specifically through the connection between the UART port and the PS / 2, thus ensuring that the cost of the chip will not be increased and the system performance will not be affected. any impact.

[0022] The so-called UART (Universal Asynchronous Receiver / Transmitter, Universal Asynchronous Receiver / Transmitter) is a chip used to control computers and serial devices, providing an RS-232C data terminal equipment interface; The parallel data transferred internally is converted to an output serial data stream.

[0023] see figure 2 , represents the signal timing diagram of the PS / 2 interface, respectively showing the clock signal CLOCK and the data signal DATA. It can be seen from the figure that the timing format of the DATA signal and the sending and receiving signal of the UART are exactly the same: both have a start bit and a stop bit, and the start bit is low, and the st...

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Abstract

The invention relates to an input-output interface of computer equipment, in particular to an embedded processor-based analog PS / 2 interface implementation system and method. The system comprises a host and a PS / 2 device, wherein the host is equipped with an embedded processor, and the PS / 2 device is provided with a PS / 2 interface; and the embedded processor is provided with a UART (Universal Asynchronous Receiver Transmitter) interface electrically connected with the PS / 2 interface. A sending pin of the UART interface is connected with a clock pin of the PS / 2 interface; and a receiving pin of the UART interface is connected with a data pin of the PS / 2 interface. The method comprises the steps of: collecting clock signals from the PS / 2 interface in the PS / 2 device via the sending pin of the UART interface in the embedded processor of the host and synchronously outputting data signals to the data pin of the PS / 2 interface via the receiving pin of the UART interface while sending data by the host; and directly inputting the data signals from the data pin of the PS / 2 interface via the receiving pin of the UART interface and invalidating the clock signals from the clock pin of the PS / 2 interface while receiving the data by the host. Through the communication between the UART interface and the PS / 2 interface, the PS / 2 interface of the embedded processor does not increase the chip cost and affect the system performance.

Description

technical field [0001] The invention relates to an input and output interface of computer equipment, in particular to a system and method for realizing an analog PS / 2 interface based on an embedded processor. Background technique [0002] The PS / 2 device interface, used in many modern mice and keyboards, was developed by IBM and originally appeared in the IBM Technical Reference Manual. figure 1 It shows the definition of a 5-PINPS / 2 interface, in which 1 is the clock pin, 2 is the data pin, 3 pin is reserved, 4 is connected to the 5V power supply positive, and 5 pin is grounded. In the field of embedded processors, to support the PS / 2 interface, either add a separate controller driver, or use GPIO (General Purpose Input Output, general purpose input / output) to simulate. For the former, there will be a certain increase in the cost of the chip; for the latter, the complexity of the software will be increased, and the system performance will be reduced to a certain extent. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/00G06F3/023G06F3/038
Inventor 徐畅胡胜发
Owner ANYKA (GUANGZHOU) MICROELECTRONICS TECH CO LTD
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