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A kind of insulated gate bipolar transistor structure and its manufacturing method

A technology for bipolar transistors and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as affecting the size of the N body region, achieve structural latch-up balance, reduce manufacturing costs, and threshold voltage balance Effect

Active Publication Date: 2016-04-13
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, high-temperature advancement hopes to push the P body region as deep as possible, which will inevitably affect the selection of the size of the N body region

Method used

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  • A kind of insulated gate bipolar transistor structure and its manufacturing method
  • A kind of insulated gate bipolar transistor structure and its manufacturing method
  • A kind of insulated gate bipolar transistor structure and its manufacturing method

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Embodiment Construction

[0034] The manufacturing method of the insulated gate bipolar transistor structure of the present invention includes:

[0035] Such as image 3 As shown, in step (1), P-type impurities are implanted in the N-body region 3 of the device, and a P-type body region 7 that satisfies the anti-latch-up capability is formed through high-temperature advancement;

[0036] Such as Figure 4 As shown, in step (2), the hard mask plate 9 is deposited, glue is applied, the area of ​​the trench 11 is exposed, the hard mask plate 9 in the area of ​​the trench 11 is carved, and the trench 5 is made by using the hard mask plate;

[0037] Such as Figure 5 As shown, in step (3), perform angled N-type impurity implantation, and inject N-type impurities into the sidewall of the trench 11;

[0038] Such as Figure 6 As shown, in step (4), the gate of the trench 11 is oxidized, and this thermal process is used to complete the activation and advancement of the N-type impurities, so as to realize t...

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Abstract

The invention discloses a preparation method of an insulated gate bipolar transistor structure. The preparation method of the insulated gate bipolar transistor structure comprises the steps of pouring P-type impurities in an N body region of a device; forming a trench by utilizing a hard mask plate; pouring the N-type impurities with angles, and pouring the N-type impurities into the side wall of the trench; oxidizing a trench region gate, activating and propelling the N-type impurities by utilizing the heat process, regulating the net doped concentration of the trench region so as to meet the threshold requirement; filling gate electrode materials in the trench so as to form a gate electrode; and pouring the N-type impurities through heavy doping so as to form a N+ emitting region, and educing an emitting electrode and a collector electrode. The invention also discloses the insulated gate bipolar transistor structure. Primary pouring of P-type impurity and primary pouring of N-type impurity with angles are adopted for the preparation method provided by the invention, and the latch and threshold voltage balance of a trench insulated gate bipolar transistor can be achieved. The preparation method provided by the invention can lower the preparation cost of the insulated gate bipolar transistor.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor devices, in particular to a method for manufacturing an insulated gate bipolar transistor structure. The invention also relates to an insulated gate bipolar transistor structure. Background technique [0002] Insulated Gate Bipolar Transistor (IGBT) is a high-power discrete device with high withstand voltage and conductivity. However, due to the PNPN thyristor structure in its own structure, it is prone to latch-up effect, resulting in out-of-control of the device. In order to avoid the latch-up of the IGBT, it is necessary to increase the concentration of the P-body region and the depth of the P-body region at the emitter end of the device, but this will lead to an increase in the threshold voltage of the device and an increase in the resistance of the channel region, thereby affecting the device's performance. Conductivity. Therefore, the balance between the anti-latch-up capability...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/739H01L29/06H01L21/331H01L21/265
Inventor 刘坤张帅
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP