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Input-independent self-calibration method and apparatus for successive approximation analog-to-digital converter with charge-redistribution digital to analog converter

An analog-to-digital converter, self-calibration technology, applied in the direction of analog/digital conversion calibration/test, analog/digital conversion, code conversion, etc., can solve problems such as mismatch drift, signal-to-noise ratio and effective bit degradation of distortion rate

Active Publication Date: 2013-04-10
NXP BV
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Problems solved by technology

This input-dependent linearity error degrades the signal-to-noise and distortion ratio (SNDR) and effective number of bits (ENOB) of the ADC 300
Also, one-time fabrication position calibration typically limits the effect of nonlinear error correction when ambient temperature changes, and mismatch drifts with aging

Method used

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  • Input-independent self-calibration method and apparatus for successive approximation analog-to-digital converter with charge-redistribution digital to analog converter
  • Input-independent self-calibration method and apparatus for successive approximation analog-to-digital converter with charge-redistribution digital to analog converter
  • Input-independent self-calibration method and apparatus for successive approximation analog-to-digital converter with charge-redistribution digital to analog converter

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Embodiment Construction

[0023] In an embodiment according to the invention, the calibration process is divided into two steps: error detection and error correction.

[0024] A. Error detection:

[0025] Figure 4 A block diagram of a SAR ADC 400 with self-calibration circuitry according to the present invention is shown. SAR ADC 400 includes comparator 410 , functional capacitor array 420 , calibration capacitor array 430 , control logic 440 and calibration logic 450 . Analog input voltage "V IN ", positive reference voltage "V REFP ” and negative reference voltage “V REFN is provided to both the functional capacitor array 420 and the calibration capacitor array 430 under the control of the control logic 440 and the calibration logic 450 to generate the binary search voltage and the error correction voltage, respectively. The binary search voltage is generated by the functional capacitor array 420 The reference voltage used to gradually approach the analog input voltage, where the latter step si...

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Abstract

A method and apparatus for correcting the offset and linearity error of a data acquisition system. A charge redistribution digital to analog convertor (CDAC) is connected to one of the differential inputs of a comparator whose second input comes from a function CDAC. The calibration algorithm is built into a digital control unit. The digital control unit detects the offset and capacitor mismatch errors sequentially, stores the calibration codes for each error in calibration mode and provides the input-dependent error correction signals synchronized with the binary search timing to adjust the differential input of the comparator and compensate the input-dependent errors present at the output of the non-ideal function CDAC during normal conversions.

Description

technical field [0001] The present invention relates to an input independent self-calibration method and apparatus for a successive approximation analog-to-digital converter with a charge redistribution digital-to-analog converter. Background technique [0002] An analog-to-digital converter (ADC) is a device in a data acquisition system that converts a continuous analog signal into a discrete digital representation for storage, transmission and further digital signal processing (DSP). Successive approximation (SAR) ADCs are widely used in sensor networks, portable biometrics, measurement applications, acquisition boards, digital oscilloscopes, and microcontrollers, so SAR ADCs provide low power consumption, medium speed, medium to high resolution, Minimal active analog circuitry, small die size, low latency and high reusability. [0003] figure 1 A typical structure of a SAR ADC 100 is shown, which has a comparator 110, a digital-to-analog converter (DAC) 120, and a digit...

Claims

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Application Information

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IPC IPC(8): H03M1/10
CPCH03M1/1047H03M1/468H03M1/1052H03M1/462
Inventor 吴琼凯文·马胡提
Owner NXP BV
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