Semiconductor device with multiple stress structures and method of forming the same

Abstract

A semiconductor device with multiple dislocation structures and a method for fabricating the same are disclosed. The exemplary semiconductor device includes gate structure overlying a top surface of a semiconductor substrate and a first gate spacer disposed on a sidewall of the gate structure and overlying the top surface of the substrate. The semiconductor device further includes a crystallized semiconductor material overlying the top surface of the semiconductor substrate and adjacent to a sidewall of the first gate spacer. The semiconductor device further includes a second gate spacer disposed on the sidewall of the first gate spacer and overlying the crystallized semiconductor material. The semiconductor device further includes a first stressor region disposed in the semiconductor substrate and a second stressor region disposed in the semiconductor substrate and in the crystallized semiconductor material.

Description

technical field [0001] The invention relates to the field of semiconductors, and more particularly, to a semiconductor device with multiple stress structures and a manufacturing method thereof. Background technique [0002] Semiconductor integrated circuits (ICs) have experienced rapid growth. In the course of IC evolution, component density (ie, the number of interconnected devices per chip area) has generally increased while geometry size (ie, the smallest component (or line) that can be made using a fabrication process) has decreased. This scaling down often provides advantages by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of handling and manufacturing ICs, and similar developments in IC manufacturing are required for these advances to be realized. [0003] For example, as semiconductor devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), have been scaled down through various ...

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Problems solved by technology

While existing methods of forming stressor (also known as stressor) regions of IC device

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