Method for establishing partition system based on multi-kernel MOS (Module Operating System)

A construction method and partition technology, applied in the fields of automotive electronics, avionics systems, and real-time control, can solve problems such as reducing the overall efficiency of the system, and achieve the effects of reducing system overhead, avoiding system performance degradation, and good adaptability

Inactive Publication Date: 2013-07-17
BEIHANG UNIV
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Problems solved by technology

In addition, traditional real-time operating systems such as RTEMS (Real Time Executive for Multiprocessor Systems), uC/OS-II, RT-Linux, etc. all adopt a shared storage architecture, which has Good efficiency, but in the case of an increase in the number of processor cores, the mutex, cache (cache memory) false-sharing (pseudo-sharing) and ping-pong effec

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  • Method for establishing partition system based on multi-kernel MOS (Module Operating System)
  • Method for establishing partition system based on multi-kernel MOS (Module Operating System)
  • Method for establishing partition system based on multi-kernel MOS (Module Operating System)

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[0026] In the following specific implementation examples, the present invention will be further described in detail in conjunction with the accompanying drawings. These implementation examples are described in sufficient detail to enable those skilled in the art to understand and practice the present invention. Logical, implementation and other changes may be made in the implementation without departing from the spirit and scope of the invention. Therefore, the following detailed description should not be taken in a limiting sense, and the scope of the present invention is defined only by the claims.

[0027] Such as figure 1As shown, it is a partition system constructed by the present invention. The partition system can have multiple processor cores, and its scale ranges from several to dozens. Its ISA architecture covers the X86 architecture commonly used in desktop systems, and the aerospace field The commonly used PowerPC architecture, the ARM architecture commonly used ...

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Abstract

The invention relates to a method for establishing a partition system based on a multi-kernel MOS (Module Operating System). The method is applicable to multi-core/many-core heterogeneous processor platforms. According to the principle of load balance and minimum communication latency, system partitions are mapped to proper processor cores respectively; an MOS kernel matching with ISA (Instruction Set Architecture) of the corresponding processor core is started to run on the processor core, a communication channel and an accessory management data structure are established and initialized for the partition mapped to the processor core, and the partitions are communicated by means of messaging; the MOS kernel starts operating systems and tasks inside the partitions mapped to the processor cores where the MOS kernel is located. The method allows the processor cores in varieties of ISAs to run in the same partition system, and timeliness and accuracy in program running are guaranteed to the maximum extent while system efficacy and extensibility are improved effectively.

Description

technical field [0001] The invention relates to a partition system construction method based on multi-kernel MOS (Module Operating System), which is applicable to the construction of partition systems on multi-core and many-core platforms at present and even in the future, and can be applied to avionics systems, automotive electronics, real-time control, etc. field. Background technique [0002] With the advancement of electronic process technology, the number of transistors that can be integrated on a single processor chip in the deep submicron era can reach billions, and the chip manufacturing process will continue to develop in accordance with Moore's Law in the future. In order to avoid limiting factors such as power consumption and frequency, and use more transistors and energy for effective calculations, the current processor design is changing from single-core, multi-core (several to dozens of cores) to many-core (tens of cores) cores, or even hundreds of cores), in ...

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Application Information

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IPC IPC(8): G06F9/44
Inventor 龙翔杨经纬高小鹏万寒姜博郑思遥
Owner BEIHANG UNIV
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