Package assembly and method of forming the same

Abstract

A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Patent Application No. 61 / 590,255, filed January 24, 2012, the entire contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to the manufacture of package assemblies, and more particularly, to the manufacture of package assemblies for semiconductor devices. Background technique [0004] Modern integrated circuits are made up of millions of active devices such as transistors and capacitors. These devices are initially isolated from each other, but are then interconnected to form functional circuits. Typical interconnect structures include lateral interconnects such as metal lines (wires) and vertical interconnects such as vias and contacts. The performance and density of modern integrated circuits are increasingly constrained by interconnects. On top of the interconnect structure, bond pads are formed and expose...

AI Technical Summary

Problems solved by technology

Solder ball placement or ball drop (ball drop) process is used in WLCSP technology, but there are still problems with solder ball drop performance

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